Searched refs:powerplay_table (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.c51 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
55 if (le16_to_cpu(powerplay_table->usTableSize) >=
58 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
75 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
78 powerplay_table);
87 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
90 powerplay_table);
95 (((unsigned long) powerplay_table) + table_offset);
103 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
106 powerplay_table);
50 get_vce_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
74 get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
86 get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
102 get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
115 get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
130 get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
140 get_vce_state_table( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
152 get_uvd_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
174 get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
185 get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
203 get_uvd_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
217 get_samu_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
240 get_samu_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
253 get_acp_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
276 get_acp_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
288 get_cacp_tdp_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
340 get_sclk_vdd_gfx_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
364 get_sclk_vdd_gfx_clock_voltage_dependency_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
867 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local
892 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local
981 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1113 init_overdrive_limits_V1_4(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V1_4 *fw_info) argument
1136 init_overdrive_limits_V2_1(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V2_1 *fw_info) argument
1166 init_overdrive_limits(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1313 init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1537 init_dpm2_parameters(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1611 init_phase_shedding_table(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1669 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local
1700 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; local
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H A Dvega10_processpptables.c68 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
72 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) +
73 le16_to_cpu(powerplay_table->usStateArrayOffset));
75 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
78 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset,
80 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
120 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
129 (((unsigned long)powerplay_table) +
130 le16_to_cpu(powerplay_table->usThermalControllerOffset));
132 PP_ASSERT_WITH_CODE((powerplay_table
66 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) argument
118 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) argument
306 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) argument
871 init_powerplay_extended_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) argument
1059 init_dpm_2_parameters( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) argument
1150 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local
1345 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local
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H A Dvega12_processpptables.c65 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table)
67 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
70 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
192 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table)
198 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
199 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
207 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX)
211 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]);
213 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]);
217 powerplay_table
63 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) argument
190 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) argument
264 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; local
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H A Dprocess_pptables_v1_0.c240 * @powerplay_table: Pointer to the PowerPlay Table.
244 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
254 le16_to_cpu(powerplay_table->usUlvVoltageOffset);
261 le16_to_cpu(powerplay_table->usPowerControlLimit);
277 if (0 != powerplay_table->usVddcLookupTableOffset) {
279 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) +
280 le16_to_cpu(powerplay_table->usVddcLookupTableOffset));
286 if (0 != powerplay_table->usVddgfxLookupTableOffset) {
288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) +
289 le16_to_cpu(powerplay_table
885 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table) argument
1144 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; local
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H A Dvega20_processpptables.c639 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
641 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
644 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
647 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) {
650 powerplay_table->smcPPTable.Version,
655 //dump_pptable(&powerplay_table->smcPPTable);
816 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
824 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
825 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
827 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table
637 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) argument
814 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) argument
911 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; local
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H A Dvega10_hwmgr.c3124 ATOM_Vega10_POWERPLAYTABLE *powerplay_table = local
3128 (((unsigned long)powerplay_table) +
3129 le16_to_cpu(powerplay_table->usSocclkDependencyTableOffset));
3132 (((unsigned long)powerplay_table) +
3133 le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset));
3136 (((unsigned long)powerplay_table) +
3137 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));
H A Dsmu7_hwmgr.c3599 ATOM_Tonga_POWERPLAYTABLE *powerplay_table = local
3603 (((unsigned long)powerplay_table) +
3604 le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));
3608 (((unsigned long)powerplay_table) +
3609 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c338 struct smu_13_0_7_powerplay_table *powerplay_table = local
348 if (powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC)
351 if (powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_BACO) {
354 if ((powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_MACO)
364 powerplay_table->thermal_controller_type;
370 smu->od_settings = &powerplay_table->overdrive_table;
378 struct smu_13_0_7_powerplay_table *powerplay_table = local
383 powerplay_table->smc_pptable.SkuTable.DebugOverrides |= 0x00000080;
385 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
1987 struct smu_13_0_7_powerplay_table *powerplay_table local
2319 struct smu_13_0_7_powerplay_table *powerplay_table = local
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H A Dsmu_v13_0_0_ppt.c347 struct smu_13_0_0_powerplay_table *powerplay_table = local
356 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_HARDWAREDC)
359 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_BACO) {
362 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_MACO)
371 powerplay_table->thermal_controller_type;
377 smu->od_settings = &powerplay_table->overdrive_table;
388 struct smu_13_0_0_powerplay_table *powerplay_table = local
391 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
1998 struct smu_13_0_0_powerplay_table *powerplay_table = local
2022 range->software_shutdown_temp = powerplay_table
2355 struct smu_13_0_0_powerplay_table *powerplay_table = local
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H A Daldebaran_ppt.c389 struct smu_13_0_powerplay_table *powerplay_table = local
393 powerplay_table->thermal_controller_type;
401 struct smu_13_0_powerplay_table *powerplay_table = local
403 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
1004 struct smu_13_0_powerplay_table *powerplay_table = local
1021 range->software_shutdown_temp = powerplay_table->software_shutdown_temp;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c368 struct smu_11_0_powerplay_table *powerplay_table = local
374 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||
375 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) {
386 struct smu_11_0_powerplay_table *powerplay_table = local
389 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC)
395 powerplay_table->thermal_controller_type;
401 smu->od_settings = &powerplay_table->overdrive_table;
462 struct smu_11_0_powerplay_table *powerplay_table = local
465 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
2282 struct smu_11_0_powerplay_table *powerplay_table local
2338 struct smu_11_0_powerplay_table *powerplay_table = local
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H A Darcturus_ppt.c412 struct smu_11_0_powerplay_table *powerplay_table = local
418 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||
419 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) {
443 struct smu_11_0_powerplay_table *powerplay_table = local
450 powerplay_table->thermal_controller_type;
458 struct smu_11_0_powerplay_table *powerplay_table = local
461 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
1027 struct smu_11_0_powerplay_table *powerplay_table = local
1048 range->software_shutdown_temp = powerplay_table->software_shutdown_temp;
H A Dsienna_cichlid_ppt.c365 struct smu_11_0_7_powerplay_table *powerplay_table = local
371 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_BACO) {
413 struct smu_11_0_7_powerplay_table *powerplay_table = local
416 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC)
423 powerplay_table->thermal_controller_type;
429 smu->od_settings = &powerplay_table->overdrive_table;
467 struct smu_11_0_7_powerplay_table *powerplay_table = local
472 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,
632 struct smu_11_0_7_powerplay_table *powerplay_table = local
650 if (powerplay_table) {
2044 struct smu_11_0_7_powerplay_table *powerplay_table = local
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