powerplay/hwmgr/processpptables.c

51 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
55 	if (le16_to_cpu(powerplay_table->usTableSize) >=
58 			(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
75 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
78 						powerplay_table);
87 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
90 							powerplay_table);
95 			(((unsigned long) powerplay_table) + table_offset);
103 				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
106 							powerplay_table);
110 							powerplay_table);
116 							const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
118 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);
123 			(const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *)(((unsigned long) powerplay_table) + table_offset);
130 static uint16_t get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
132 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);
135 		return table_offset + get_vce_clock_voltage_limit_table_size(hwmgr, powerplay_table);
142 						const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
144 	uint16_t table_offset = get_vce_state_table_offset(hwmgr, powerplay_table);
147 		return (const ATOM_PPLIB_VCE_State_Table *)(((unsigned long) powerplay_table) + table_offset);
153 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
157 	if (le16_to_cpu(powerplay_table->usTableSize) >=
160 			(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
175 			 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
178 						    powerplay_table);
186 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
189 						    powerplay_table);
194 					(((unsigned long) powerplay_table)
205 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
208 						     powerplay_table);
212 			get_uvd_clock_info_array_size(hwmgr, powerplay_table);
218 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
222 	if (le16_to_cpu(powerplay_table->usTableSize) >=
225 			(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
242 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
245 					    powerplay_table);
254 				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
258 	if (le16_to_cpu(powerplay_table->usTableSize) >=
261 			(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
278 				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
280 	uint16_t tableOffset = get_acp_table_offset(hwmgr, powerplay_table);
290 				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
294 	if (le16_to_cpu(powerplay_table->usTableSize) >=
297 				(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
341 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
345 	if (le16_to_cpu(powerplay_table->usTableSize) >=
348 				(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
366 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
368 	uint16_t tableOffset = get_sclk_vdd_gfx_table_offset(hwmgr, powerplay_table);
867 	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr);
869 	if (powerplay_table == NULL)
872 	if (powerplay_table->sHeader.ucTableFormatRevision >= 6) {
873 		pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) +
874 					le16_to_cpu(powerplay_table->usStateArrayOffset));
878 		*num_of_entries = (unsigned long)(powerplay_table->ucNumStates);
892 	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr);
902 	if (powerplay_table == NULL)
907 	if (powerplay_table->sHeader.ucTableFormatRevision >= 6) {
908 		pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) +
909 					le16_to_cpu(powerplay_table->usStateArrayOffset));
915 		pclock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) +
916 					le16_to_cpu(powerplay_table->usClockInfoArrayOffset));
918 		pnon_clock_arrays = (NonClockInfoArray *)(((unsigned long)powerplay_table) +
919 						le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset));
935 		if (entry_index > powerplay_table->ucNumStates)
938 		pstate_entry = (ATOM_PPLIB_STATE *)((unsigned long)powerplay_table +
939 						    le16_to_cpu(powerplay_table->usStateArrayOffset) +
940 						    entry_index * powerplay_table->ucStateEntrySize);
942 		pnon_clock_info = (ATOM_PPLIB_NONCLOCK_INFO *)((unsigned long)powerplay_table +
943 						le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset) +
945 						powerplay_table->ucNonClockSize);
948 							powerplay_table->ucNonClockSize,
951 		for (i = 0; i < powerplay_table->ucStateEntrySize-1; i++) {
952 			const void *pclock_info = (const void *)((unsigned long)powerplay_table +
953 						le16_to_cpu(powerplay_table->usClockInfoArrayOffset) +
955 						powerplay_table->ucClockInfoSize);
974 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table
983 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
988 			powerplay_table->sThermalController.ucType;
990 			powerplay_table->sThermalController.ucI2cLine;
992 			powerplay_table->sThermalController.ucI2cAddress;
995 		(0 != (powerplay_table->sThermalController.ucFanParameters &
999 		powerplay_table->sThermalController.ucFanParameters &
1003 		= powerplay_table->sThermalController.ucFanMinRPM * 100UL;
1005 		= powerplay_table->sThermalController.ucFanMaxRPM * 100UL;
1011         if (powerplay_table->usTableSize >= sizeof(ATOM_PPLIB_POWERPLAYTABLE3)) {
1013 			(const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
1020 				(const ATOM_PPLIB_FANTABLE *)(((unsigned long)powerplay_table) +
1047 					(const ATOM_PPLIB_FANTABLE2 *)(((unsigned long)powerplay_table) +
1055 					(const ATOM_PPLIB_FANTABLE3 *) (((unsigned long)powerplay_table) +
1077 					(const ATOM_PPLIB_FANTABLE4 *)(((unsigned long)powerplay_table) +
1089 					(const ATOM_PPLIB_FANTABLE5 *)(((unsigned long)powerplay_table) +
1114 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table,
1137 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table,
1143 	if (le16_to_cpu(powerplay_table->usTableSize) <
1147 	powerplay_table3 = (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table;
1152 	header = (ATOM_PPLIB_EXTENDEDHEADER *)(((unsigned long) powerplay_table) +
1167 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
1192 				powerplay_table,
1198 				powerplay_table,
1314 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
1337 						hwmgr, powerplay_table);
1339 						powerplay_table);
1342 				(((unsigned long) powerplay_table) +
1346 				(((unsigned long) powerplay_table) + table_offset);
1352 	uvd_clock_info_array_offset = get_uvd_clock_info_array_offset(hwmgr, powerplay_table);
1353 	table_offset = get_uvd_clock_voltage_limit_table_offset(hwmgr, powerplay_table);
1357 				(((unsigned long) powerplay_table) +
1361 				(((unsigned long) powerplay_table) + table_offset);
1367 							    powerplay_table);
1372 				(((unsigned long) powerplay_table) + table_offset);
1378 							     powerplay_table);
1383 				(((unsigned long) powerplay_table) + table_offset);
1388 	table_offset = get_cacp_tdp_table_offset(hwmgr, powerplay_table);
1390 		UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset);
1395 				(((unsigned long) powerplay_table) + table_offset);
1404 				(((unsigned long) powerplay_table) + table_offset);
1411 	if (le16_to_cpu(powerplay_table->usTableSize) >=
1414 				(const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table;
1468 								powerplay_table);
1472 			(((unsigned long) powerplay_table) + table_offset);
1538 			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
1542 	if (le16_to_cpu(powerplay_table->usTableSize) >=
1545 				(const ATOM_PPLIB_POWERPLAYTABLE5 *)powerplay_table;
1594 					(((unsigned long)powerplay_table) +
1601 					(((unsigned long)powerplay_table) + table_offset);
1612 		const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
1614 	if (le16_to_cpu(powerplay_table->usTableSize) >=
1617 				(const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table;
1669 	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr);
1671 	const ATOM_PPLIB_VCE_State_Table *vce_state_table = get_vce_state_table(hwmgr, powerplay_table);
1673 	unsigned short vce_clock_info_array_offset = get_vce_clock_info_array_offset(hwmgr, powerplay_table);
1675 	const VCEClockInfoArray *vce_clock_info_array = (const VCEClockInfoArray *)(((unsigned long) powerplay_table) + vce_clock_info_array_offset);
1677 	const ClockInfoArray *clock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) +
1678 								le16_to_cpu(powerplay_table->usClockInfoArrayOffset));
1700 	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table;
1707 	powerplay_table = get_powerplay_table(hwmgr);
1709 	result = init_powerplay_tables(hwmgr, powerplay_table);
1715 				le32_to_cpu(powerplay_table->ulPlatformCaps));
1720 	result = init_thermal_controller(hwmgr, powerplay_table);
1725 	result = init_overdrive_limits(hwmgr, powerplay_table);
1731 					       powerplay_table);
1736 	result = init_dpm2_parameters(hwmgr, powerplay_table);
1741 	result = init_phase_shedding_table(hwmgr, powerplay_table);