Lines Matching refs:powerplay_table

240  * @powerplay_table: Pointer to the PowerPlay Table.
244 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
254 le16_to_cpu(powerplay_table->usUlvVoltageOffset);
261 le16_to_cpu(powerplay_table->usPowerControlLimit);
277 if (0 != powerplay_table->usVddcLookupTableOffset) {
279 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) +
280 le16_to_cpu(powerplay_table->usVddcLookupTableOffset));
286 if (0 != powerplay_table->usVddgfxLookupTableOffset) {
288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) +
289 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset));
298 (((unsigned long)powerplay_table) + le16_to_cpu(powerplay_table->usPPMTableOffset));
300 if (0 != powerplay_table->usPPMTableOffset) {
785 * @powerplay_table: Pointer to the PowerPlay Table.
789 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
797 (const ATOM_Tonga_MM_Dependency_Table *)(((unsigned long) powerplay_table) +
798 le16_to_cpu(powerplay_table->usMMDependencyTableOffset));
800 (const PPTable_Generic_SubTable_Header *)(((unsigned long) powerplay_table) +
801 le16_to_cpu(powerplay_table->usPowerTuneTableOffset));
803 (const ATOM_Tonga_MCLK_Dependency_Table *)(((unsigned long) powerplay_table) +
804 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));
806 (const PPTable_Generic_SubTable_Header *)(((unsigned long) powerplay_table) +
807 le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));
809 (const ATOM_Tonga_Hard_Limit_Table *)(((unsigned long) powerplay_table) +
810 le16_to_cpu(powerplay_table->usHardLimitTableOffset));
812 (const PPTable_Generic_SubTable_Header *)(((unsigned long) powerplay_table) +
813 le16_to_cpu(powerplay_table->usPCIETableOffset));
815 (const ATOM_Tonga_GPIO_Table *)(((unsigned long) powerplay_table) +
816 le16_to_cpu(powerplay_table->usGPIOTableOffset));
824 if (powerplay_table->usMMDependencyTableOffset != 0)
828 if (result == 0 && powerplay_table->usPowerTuneTableOffset != 0)
832 if (result == 0 && powerplay_table->usSclkDependencyTableOffset != 0)
836 if (result == 0 && powerplay_table->usMclkDependencyTableOffset != 0)
840 if (result == 0 && powerplay_table->usPCIETableOffset != 0)
844 if (result == 0 && powerplay_table->usHardLimitTableOffset != 0)
881 * @powerplay_table: the address of the PowerPlay table.
887 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table)
890 le32_to_cpu(powerplay_table->ulMaxODEngineClock);
892 le32_to_cpu(powerplay_table->ulMaxODMemoryClock);
905 * @powerplay_table: Pointer to the PowerPlay Table.
910 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
917 (((unsigned long)powerplay_table) +
918 le16_to_cpu(powerplay_table->usThermalControllerOffset));
919 PP_ASSERT_WITH_CODE((0 != powerplay_table->usThermalControllerOffset),
944 if (0 == powerplay_table->usFanTableOffset) {
950 (((unsigned long)powerplay_table) +
951 le16_to_cpu(powerplay_table->usFanTableOffset));
953 PP_ASSERT_WITH_CODE((0 != powerplay_table->usFanTableOffset),
1115 * @powerplay_table: Pointer to the PowerPlay Table.
1120 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
1125 state_arrays = (ATOM_Tonga_State_Array *)(((unsigned long)powerplay_table) +
1126 le16_to_cpu(powerplay_table->usStateArrayOffset));
1129 powerplay_table->sHeader.ucTableFormatRevision),
1131 PP_ASSERT_WITH_CODE((0 != powerplay_table->usStateArrayOffset),
1133 PP_ASSERT_WITH_CODE((0 < powerplay_table->sHeader.usStructureSize),
1144 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table;
1151 powerplay_table = get_powerplay_table(hwmgr);
1153 PP_ASSERT_WITH_CODE((NULL != powerplay_table),
1156 result = check_powerplay_tables(hwmgr, powerplay_table);
1162 le32_to_cpu(powerplay_table->ulPlatformCaps));
1167 result = init_thermal_controller(hwmgr, powerplay_table);
1172 result = init_over_drive_limits(hwmgr, powerplay_table);
1177 result = init_clock_voltage_dependency(hwmgr, powerplay_table);
1182 result = init_dpm_2_parameters(hwmgr, powerplay_table);