Searched refs:phy_read_mmd (Results 1 - 25 of 36) sorted by relevance

12

/linux-master/drivers/net/phy/
H A Dteranetics.c39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93))
54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) {
55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT);
62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
H A Dbcm87xx.c60 val = phy_read_mmd(phydev, devid, reg);
106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS,
122 xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS,
144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL);
150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS);
164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS);
H A Dbcm84881.c129 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
133 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
146 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
155 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
159 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
185 val = phy_read_mmd(phydev, MDIO_MMD_AN,
209 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011);
H A Dphy-c45.c22 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE);
40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1);
117 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
121 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2);
370 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
404 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
425 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
448 val = phy_read_mmd(phydev, devad, MDIO_STAT1);
455 val = phy_read_mmd(phydev, devad, MDIO_STAT1);
478 val = phy_read_mmd(phyde
[all...]
H A Dmarvell-88q2xxx.c203 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT);
215 ret = phy_read_mmd(phydev, MDIO_MMD_PCS,
224 ret = phy_read_mmd(phydev, MDIO_MMD_PCS,
250 ret = phy_read_mmd(phydev, MDIO_MMD_PCS,
260 ret = phy_read_mmd(phydev, MDIO_MMD_PCS,
268 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1);
305 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT);
322 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT2);
443 ret = phy_read_mmd(phydev, MDIO_MMD_PCS,
458 ret = phy_read_mmd(phyde
[all...]
H A Dadin1100.c84 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS);
148 int rc = phy_read_mmd(phydev, MDIO_MMD_VEND2,
177 irq_status = phy_read_mmd(phydev, MDIO_MMD_VEND2,
249 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT);
283 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1);
289 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL);
H A Ddp83td510.c93 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_INTERRUPT_REG_1);
140 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2,
183 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_MSE_DETECT);
H A Ddp83tc811.c120 value = phy_read_mmd(phydev, DP83811_DEVADDR,
166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG);
172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR,
177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR,
182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR,
369 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG);
H A Dmicrochip_t1s.c109 return phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN865X_REG_CFGPARAM_DATA);
138 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2,
223 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
229 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
H A Dmarvell10g.c195 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
200 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP);
376 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1);
437 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1);
520 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT);
536 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0);
542 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER1);
611 mactype = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL);
665 mactype = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL);
888 val = phy_read_mmd(phyde
[all...]
H A Dmarvell-88x2222.c307 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
315 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT);
328 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
364 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT);
390 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT);
416 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT);
H A Ddp83869.c253 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
349 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
365 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
375 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
385 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
514 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
567 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
832 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
H A Ddp83822.c169 value = phy_read_mmd(phydev, DP83822_DEVADDR,
229 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
235 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
240 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
245 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
673 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1);
738 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
752 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
H A Dnxp-c45-tja11xx.c311 ret = phy_read_mmd(phydev, reg_field->devad, reg_field->reg);
380 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
382 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
384 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
386 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
506 extts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
508 extts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
510 extts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
512 extts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1,
525 reg = phy_read_mmd(phyde
[all...]
H A Ddp83867.c216 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
284 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
296 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
301 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
306 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
517 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR,
700 delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL);
781 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2);
831 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1);
846 val = phy_read_mmd(phyde
[all...]
H A Dmicrochip.c266 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID);
267 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV);
325 val = phy_read_mmd(phydev, MDIO_MMD_PCS,
H A Ddp83tg720.c97 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_SQI_REG_1);
H A Dadin.c282 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG);
328 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG);
441 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_FLD_EN_REG);
789 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1,
816 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1);
825 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2);
933 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1,
944 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1,
980 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN);
H A Dmicrel.c1043 newval = phy_read_mmd(phydev, 2, reg);
1083 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD);
1285 newval = phy_read_mmd(phydev, 2, reg);
1355 reg = phy_read_mmd(phydev, 2, 0);
3987 ret = phy_read_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG,
4065 *nsec = phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_NS_HI);
4070 *nsec = *nsec | phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_NS_LO);
4072 *sec = phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_SEC_HI);
4074 *sec = *sec | phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_SEC_LO);
4076 *seq = phy_read_mmd(phyde
[all...]
/linux-master/drivers/net/phy/aquantia/
H A Daquantia_main.c152 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg);
158 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1);
243 err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2);
266 err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2);
278 irq_status = phy_read_mmd(phydev, MDIO_MMD_AN,
298 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1);
318 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1);
357 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg);
381 val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS);
423 val = phy_read_mmd(phyde
[all...]
H A Daquantia_hwmon.c44 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg);
70 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg);
H A Daquantia_firmware.c138 up_crc = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_MAILBOX_INTERFACE2);
360 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID);
/linux-master/drivers/net/phy/qcom/
H A Dqca807x.c264 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
283 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
374 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg);
387 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg);
780 control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
H A Dqca808x.c163 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
257 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
523 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
H A Dqcom-phy-lib.c536 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg);
598 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS);
635 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);

Completed in 235 milliseconds

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