Searched refs:phase_delay (Results 1 - 18 of 18) sorted by relevance

/linux-master/drivers/mmc/host/
H A Dsdhci-omap.c329 u32 phase_delay = 0; local
375 while (phase_delay <= MAX_PHASE_DELAY) {
376 sdhci_omap_set_dll(omap_host, phase_delay);
386 start_window = phase_delay;
399 phase_delay += 4;
413 phase_delay = min(max_window + 4 * (max_len - 1) - 24,
417 phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4;
419 phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4;
421 phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4;
423 phase_delay
[all...]
/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_common.h210 u32 freq, s32 phase_delay);
213 u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay);
216 u8 src_sel, u32 freq, s32 phase_delay);
H A Dice_common.c4983 * @phase_delay: Delay in ps
4990 u32 freq, s32 phase_delay)
5001 cmd->phase_delay = cpu_to_le32(phase_delay);
5015 * @phase_delay: Delay in ps
5022 u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay)
5044 if (phase_delay)
5045 *phase_delay = le32_to_cpu(cmd->phase_delay);
5058 * @phase_delay
4989 ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2, u32 freq, s32 phase_delay) argument
5021 ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type, u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay) argument
5064 ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags, u8 src_sel, u32 freq, s32 phase_delay) argument
[all...]
H A Dice_adminq_cmd.h2178 __le32 phase_delay; member in struct:ice_aqc_set_cgu_input_config
2205 __le32 phase_delay; member in struct:ice_aqc_get_cgu_input_config
2226 __le32 phase_delay; member in struct:ice_aqc_set_cgu_output_config
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.h128 u32 phase_delay; member in struct:atom_voltage_table
H A Damdgpu_atombios.c1394 voltage_table->phase_delay = gpio->ucPhaseDelay;
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.c221 table->phase_delay = vol_table->phase_delay;
261 vol_table->phase_delay = 0;
289 vol_table->phase_delay = 0;
316 vol_table->phase_delay = 0;
H A Dppatomfwctrl.h46 uint32_t phase_delay; member in struct:pp_atomfwctrl_voltage_table
H A Dppatomctrl.h201 uint32_t phase_delay; /* Used for ATOM_GPIO_VOLTAGE_OBJECT_V3 and later */ member in struct:pp_atomctrl_voltage_table
H A Dppatomfwctrl.c139 voltage_table->phase_delay =
H A Dvega10_hwmgr.c1028 table->phase_delay = vol_table->phase_delay;
1066 vol_table->phase_delay = 0;
1093 vol_table->phase_delay = 0;
1119 vol_table->phase_delay = 0;
H A Dppatomctrl.c602 voltage_table->phase_delay =
H A Dsmu7_hwmgr.c297 voltage_table->phase_delay = 0;
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_mode.h642 u32 phase_delay; member in struct:atom_voltage_table
H A Dsi_dpm.c3882 voltage_table->phase_delay = 0;
4036 (u32)si_pi->vddc_phase_shed_table.phase_delay);
H A Dradeon_atombios.c3800 voltage_table->phase_delay = gpio->ucPhaseDelay;
H A Dci_dpm.c2079 voltage_table->phase_delay = 0;
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c4403 voltage_table->phase_delay = 0;
4557 (u32)si_pi->vddc_phase_shed_table.phase_delay);

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