Searched refs:parent (Results 1 - 25 of 90) sorted by last modified time

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/seL4-camkes-master/kernel/src/arch/riscv/kernel/
H A Dvspace.c451 static exception_t performASIDControlInvocation(void *frame, cte_t *slot, cte_t *parent, asid_t asid_base) argument
455 cap_untyped_cap_ptr_set_capFreeIndex(&(parent->cap),
456 MAX_FREE_INDEX(cap_untyped_cap_get_capBlockSize(parent->cap)));
466 parent, local
/seL4-camkes-master/kernel/src/arch/arm/64/kernel/
H A Dvspace.c1670 cte_t *parent, asid_t asid_base)
1672 cap_untyped_cap_ptr_set_capFreeIndex(&(parent->cap),
1673 MAX_FREE_INDEX(cap_untyped_cap_get_capBlockSize(parent->cap)));
1681 ), parent, slot); local
1669 performASIDControlInvocation(void *frame, cte_t *slot, cte_t *parent, asid_t asid_base) argument
/seL4-camkes-master/kernel/src/arch/arm/32/kernel/
H A Dvspace.c2024 cte_t *parent, asid_t asid_base)
2029 cap_untyped_cap_ptr_set_capFreeIndex(&(parent->cap),
2030 MAX_FREE_INDEX(cap_untyped_cap_get_capBlockSize(parent->cap)));
2036 parent, slot);; local
2023 performASIDControlInvocation(void *frame, cte_t *slot, cte_t *parent, asid_t asid_base) argument
/seL4-camkes-master/projects/camkes-tool/camkes/ast/
H A Dobjects.py254 if isinstance(self.parent, Assembly):
331 if isinstance(self.parent, Assembly):
332 for i in self.parent.composition.instances:
982 return self.parent.label()
992 # self.parent is a connection
993 # self.parent.parent is a composition
994 # self.parent.parent.parent i
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/seL4-camkes-master/kernel/src/object/
H A Dobjecttype.c586 void createNewObjects(object_t t, cte_t *parent, slot_range_t slots, argument
608 insertNewCap(parent, &slots.cnode[slots.offset + i], cap);
H A Dcnode.c394 * parent.
431 /* Prevent parent untyped cap from being used again if creating a child
745 void insertNewCap(cte_t *parent, cte_t *slot, cap_t cap) argument
749 next = CTE_PTR(mdb_node_get_mdbNext(parent->cteMDBNode));
751 slot->cteMDBNode = mdb_node_new(CTE_REF(next), true, true, CTE_REF(parent));
755 mdb_node_ptr_set_mdbNext(&parent->cteMDBNode, CTE_REF(slot));
/seL4-camkes-master/kernel/manual/parts/
H A Dobjects.tex394 parent untyped object. That is, any child of a device untyped will
/seL4-camkes-master/projects/camkes-tool/camkes/runner/
H A DContext.py105 perm='RWX', cached=True, label=entity.parent.label(), with_mapping_caps=None:
111 (lambda global_name, size, frame_size=None, label=entity.parent.label():
H A D__main__.py307 die(rendering_error(i.parent.name, inst))
/seL4-camkes-master/projects/global-components/components/ClockServer/src/
H A Dclock_server.c166 int the_clock_register_child(clk_id_t parent, clk_id_t child) argument
170 if (!check_valid_clk_id(parent) || !check_valid_clk_id(child)) {
177 if (!check_clk_initialised(parent)) {
183 if (!check_is_owner(parent, client_id)) {
184 ZF_LOGE("Client is not the owner of the parent clock");
201 clk_register_child(clock_table[parent].clk, clock_table[child].clk);
/seL4-camkes-master/projects/capdl/python-capdl-tool/tests/
H A Dallocator.py147 parent = Untyped("parent_ut", size_bits=size_bits, paddr=ut_paddr)
148 allocator.add_untyped(parent)
154 self.assertValidSpec(allocator, spec, size_bits, size_bits, [child], [parent])
189 allocator.add_untyped(Untyped("parent", paddr=paddr, size_bits=size_bits))
/seL4-camkes-master/projects/capdl/python-capdl-tool/capdl/
H A Dutil.py44 def __init__(self, coverage, pages, object, make_object, type_name, parent=None, child=None):
47 self.parent = parent
62 Index of this object in the parent level. Determine by a
65 return self.parent.child_index(vaddr)
85 levels[i].parent = levels[i - 1]
H A DPageCollection.py113 parent = vspace_root
124 parent[object_index] = object_cap
126 parent = parent[object_index].referent
133 page_cap.set_mapping(parent, level.child_index(page_vaddr))
136 parent[level.child_index(page_vaddr)] = page_cap
/seL4-camkes-master/kernel/src/arch/x86/kernel/
H A Dvspace.c52 exception_t performASIDControlInvocation(void *frame, cte_t *slot, cte_t *parent, asid_t asid_base) argument
56 cap_untyped_cap_ptr_set_capFreeIndex(&(parent->cap),
57 MAX_FREE_INDEX(cap_untyped_cap_get_capBlockSize(parent->cap)));
67 parent, local
/seL4-camkes-master/projects/projects_libs/libtx2bpmp/include/tx2bpmp/
H A Dbpmp.h958 uint32_t parent; member in struct:cmd_clk_get_all_info_response
/seL4-camkes-master/projects/global-components/components/ClockServer/libClockServer-client/include/
H A Dclockserver_client.h22 int (*clockserver_register_child)(clk_id_t parent, clk_id_t child),
/seL4-camkes-master/projects/global-components/components/ClockServer/libClockServer-client/
H A Dclockserver_client.c25 int (*clockserver_register_child)(clk_id_t parent, clk_id_t child);
94 int (*clockserver_register_child)(clk_id_t parent, clk_id_t child),
89 clockserver_interface_init(ps_io_ops_t *io_ops, int (*clockserver_init_clock)(clk_id_t id), int (*clockserver_set_gate_mode)(clock_gate_t gate, clock_gate_mode_t mode), freq_t (*clockserver_get_freq)(clk_id_t clk_id), freq_t (*clockserver_set_freq)(clk_id_t clk_id, freq_t hz), int (*clockserver_register_child)(clk_id_t parent, clk_id_t child), clock_sys_t *clock_sys) argument
/seL4-camkes-master/kernel/include/object/
H A Dobjecttype.h26 void createNewObjects(object_t t, cte_t *parent, slot_range_t slots,
H A Dcnode.h37 void insertNewCap(cte_t *parent, cte_t *slot, cap_t cap);
/seL4-camkes-master/kernel/include/arch/x86/arch/kernel/
H A Dvspace.h86 exception_t performASIDControlInvocation(void *frame, cte_t *slot, cte_t *parent, asid_t asid_base);
/seL4-camkes-master/kernel/tools/hardware/
H A Ddevice.py21 def __init__(self, node: pyfdt.pyfdt.FdtNode, parent: 'WrappedNode', path: str):
23 self.parent = parent
33 if parent is not None:
34 parent.add_child(self)
35 self.depth = parent.depth + 1
36 self.is_cpu_addressable: bool = parent.is_cpu_addressable and \
61 ''' Return this node's interrupt parent's phandle '''
62 if 'interrupt-parent' not in self.props:
63 return self.parent
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H A Dfdt.py31 # for easier parent lookups
40 parent = self.by_path[parent_path]
41 wrapped = WrappedNode(node, parent, name)
/seL4-camkes-master/kernel/manual/tools/
H A Dparse_doxygen_xml.py129 def parse_brief(self, parent):
133 para_nodes = parent.find('briefdescription').find_all('para')
136 def parse_detailed_desc(self, parent, ref_dict):
143 types_iter = iter(parent.find_all('type'))
144 names = parent.find_all('declname')
157 param_items = parent.find_all("parameteritem")
176 for n in parent.detaileddescription.find_all('para', recursive=False):
183 simplesects = parent.find_all("simplesect")
190 def parse_prototype(self, parent, escape=True):
195 inline = parent["inlin
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/seL4-camkes-master/projects/util_libs/libplatsupport/src/mach/zynq/
H A Dtimer.c254 /* Get the parent frequency */
255 if (clk->parent) {
256 fin = clk_get_freq(clk->parent);
279 if (clk->parent) {
280 fin = clk_get_freq(clk->parent);
/seL4-camkes-master/projects/util_libs/libplatsupport/src/arch/arm/
H A Dclock.c154 void clk_register_child(clk_t *parent, clk_t *child) argument
158 if (child->parent != NULL) {
159 /* If we are registered with a parent */
160 clk_t *sibling = parent->child;
161 /* Make sure that we are a sibling of the parent's child */
167 if (child->parent == NULL) {
168 child->parent = parent;
169 child->sibling = parent->child;
170 parent
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