Searched refs:or_mask (Results 1 - 18 of 18) sorted by relevance

/linux-master/drivers/virt/vboxguest/
H A Dvboxguest_core.c561 req->or_mask = fixed_events;
575 * @or_mask: The events to add.
589 u32 or_mask, u32 not_mask,
614 session->event_filter |= or_mask;
623 or_mask = gdev->fixed_events | gdev->event_filter_tracker.mask;
625 if (gdev->event_filter_host == or_mask || !req)
628 gdev->event_filter_host = or_mask;
629 req->or_mask = or_mask;
630 req->not_mask = ~or_mask;
587 vbg_set_session_event_filter(struct vbg_dev *gdev, struct vbg_session *session, u32 or_mask, u32 not_mask, bool session_termination) argument
740 vbg_acquire_session_capabilities(struct vbg_dev *gdev, struct vbg_session *session, u32 or_mask, u32 not_mask, u32 flags, bool session_termination) argument
847 vbg_set_session_capabilities(struct vbg_dev *gdev, struct vbg_session *session, u32 or_mask, u32 not_mask, bool session_termination) argument
1597 u32 or_mask, not_mask; local
1616 u32 flags, or_mask, not_mask; local
1638 u32 or_mask, not_mask; local
[all...]
H A Dvmmdev.h191 u32 or_mask; member in struct:vmmdev_mask
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsoc15.h43 u32 or_mask; member in struct:soc15_reg_golden
94 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
95 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
H A Dsoc15.c460 tmp = entry->or_mask;
466 tmp |= (entry->or_mask & entry->and_mask);
H A Damdgpu_device.c1286 u32 tmp, reg, and_mask, or_mask; local
1295 or_mask = registers[i + 2];
1298 tmp = or_mask;
1303 tmp |= (or_mask & and_mask);
1305 tmp |= or_mask;
/linux-master/arch/mips/include/asm/mach-rc32434/
H A Drb.h61 extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
/linux-master/include/uapi/linux/
H A Dvboxguest.h247 __u32 or_mask; member in struct:vbg_ioctl_change_filter::__anon3017::__anon3018
269 __u32 or_mask; member in struct:vbg_ioctl_acquire_guest_caps::__anon3019::__anon3020
291 __u32 or_mask; member in struct:vbg_ioctl_set_guest_caps::__anon3021::__anon3022
/linux-master/drivers/staging/media/atomisp/pci/
H A Dia_css_pipe_public.h276 * @param[in] or_mask Binary or of enum ia_css_event_irq_mask_type. Each pipe
292 Host less often. In case both or_mask and and_mask are
297 or_mask and and_mask may be active at the same time\n
300 or_mask = IA_CSS_EVENT_TYPE_ALL\n
347 unsigned int or_mask,
353 * @param[out] or_mask Current or_mask. The bits in this mask are a binary or
368 unsigned int *or_mask,
H A Dsh_css_sp.c1518 event_irq_mask_init.or_mask = IA_CSS_EVENT_TYPE_ALL;
1535 unsigned int or_mask,
1556 IA_CSS_LOG("or_mask=%x, and_mask=%x", or_mask, and_mask);
1557 event_irq_mask.or_mask = (uint16_t)or_mask;
1575 unsigned int *or_mask,
1600 if (or_mask)
1601 *or_mask = event_irq_mask.or_mask;
1534 ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, unsigned int or_mask, unsigned int and_mask) argument
1574 ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, unsigned int *or_mask, unsigned int *and_mask) argument
[all...]
H A Dsh_css_internal.h721 u16 or_mask; member in struct:sh_css_event_irq_mask
/linux-master/arch/mips/rb532/
H A Ddevices.c40 void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) argument
46 dev3.state = (dev3.state | or_mask) & ~nand_mask;
/linux-master/drivers/iio/adc/
H A Dmt6577_auxadc.c100 u32 or_mask, u32 and_mask)
105 val |= or_mask;
99 mt6577_auxadc_mod_reg(void __iomem *reg, u32 or_mask, u32 and_mask) argument
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_combios.c2892 uint32_t reg, val, and_mask, or_mask; local
2920 or_mask = RBIOS32(index);
2923 val = (val & and_mask) | or_mask;
2974 or_mask = RBIOS32(index);
2977 val = (val & and_mask) | or_mask;
2989 or_mask = RBIOS32(index);
2992 val = (val & and_mask) | or_mask;
3023 uint32_t val, and_mask, or_mask; local
3041 or_mask = RBIOS32(offset);
3045 tmp |= or_mask;
3103 uint32_t and_mask, or_mask; local
3212 uint32_t or_mask = RBIOS16(offset); local
[all...]
H A Dradeon_device.c206 u32 tmp, reg, and_mask, or_mask; local
215 or_mask = registers[i + 2];
218 tmp = or_mask;
222 tmp |= or_mask;
/linux-master/tools/testing/selftests/kvm/x86_64/
H A Dpmu_counters_test.c352 uint8_t nr_counters, uint32_t or_mask)
370 const bool expect_success = i < nr_counters || (or_mask & BIT(i));
351 guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_counters, uint8_t nr_counters, uint32_t or_mask) argument
/linux-master/mm/
H A Dmm_init.c81 unsigned long or_mask, add_mask; local
140 or_mask = (ZONES_MASK << ZONES_PGSHIFT) |
146 BUG_ON(or_mask != add_mask);
/linux-master/drivers/net/ethernet/natsemi/
H A Dns83820.c1677 u32 or_mask = 0; local
1681 or_mask |= RFCR_AAU | RFCR_AAM;
1686 or_mask |= RFCR_AAM;
1691 val = (readl(rfcr) & and_mask) | or_mask;
/linux-master/drivers/gpu/drm/bridge/analogix/
H A Danx7625.c176 u8 offset, u8 and_mask, u8 or_mask)
185 offset, (val & and_mask) | (or_mask));
174 anx7625_write_and_or(struct anx7625_data *ctx, struct i2c_client *client, u8 offset, u8 and_mask, u8 or_mask) argument

Completed in 268 milliseconds