/linux-master/arch/powerpc/math-emu/ |
H A D | math.c | 228 void *op0 = NULL, *op1 = NULL, *op2 = NULL, *op3 = NULL; local 332 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 338 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 344 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 353 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 363 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 368 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 372 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 377 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); 383 op0 [all...] |
/linux-master/arch/arm64/tools/ |
H A D | gen-sysreg.awk | 154 op0 = $3 164 define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2) 165 define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")") 167 define("SYS_" reg "_Op0", op0) 194 op0 = null
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/linux-master/arch/arm64/include/uapi/asm/ |
H A D | kvm.h | 249 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ 251 ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \ 518 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, 527 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
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/linux-master/tools/arch/arm64/include/uapi/asm/ |
H A D | kvm.h | 249 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ 251 ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \ 518 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, 527 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
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/linux-master/arch/x86/crypto/ |
H A D | cast6-avx-x86_64-asm_64.S | 106 #define F_head(a, x, gi1, gi2, op0) \ 107 op0 a, RKM, x; \ 129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ 130 F_head(b1, RX, RGI1, RGI2, op0); \ 131 F_head(b2, RX, RGI3, RGI4, op0); \
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H A D | cast5-avx-x86_64-asm_64.S | 106 #define F_head(a, x, gi1, gi2, op0) \ 107 op0 a, RKM, x; \ 129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ 130 F_head(b1, RX, RGI1, RGI2, op0); \ 131 F_head(b2, RX, RGI3, RGI4, op0); \
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/linux-master/tools/testing/selftests/kvm/aarch64/ |
H A D | get-reg-list.c | 185 unsigned op0, op1, crn, crm, op2; local 235 op0 = (id & KVM_REG_ARM64_SYSREG_OP0_MASK) >> KVM_REG_ARM64_SYSREG_OP0_SHIFT; 240 TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2), 242 printf("\tARM64_SYS_REG(%d, %d, %d, %d, %d),\n", op0, op1, crn, crm, op2);
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/linux-master/arch/powerpc/include/asm/ |
H A D | mpc52xx_psc.h | 205 u8 op0; /* PSC + 0x3c */ member in struct:mpc52xx_psc 346 u8 op0; /* PSC + 0x4c */ member in struct:mpc5125_psc
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/linux-master/arch/arm64/include/asm/ |
H A D | esr.h | 206 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ 207 (((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \ 220 * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0) 240 * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
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H A D | sysreg.h | 39 #define sys_reg(op0, op1, crn, crm, op2) \ 40 (((op0) << Op0_shift) | ((op1) << Op1_shift) | \ 83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints, 434 * op0 op1 CRn CRm op2 440 * op0 op1 CRn CRm op2
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/linux-master/scripts/gcc-plugins/ |
H A D | randomize_layout_plugin.c | 744 const_tree op0; local 805 op0 = TREE_OPERAND(rhs1, 0); 807 if (op0 == NULL_TREE) 810 if (TREE_CODE(op0) != VAR_DECL) 813 op0_type = TYPE_MAIN_VARIANT(strip_array_types(TYPE_MAIN_VARIANT(TREE_TYPE(op0)))); 820 MISMATCH(gimple_location(stmt), "op0", ptr_lhs_type, op0_type);
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/linux-master/arch/powerpc/kernel/trace/ |
H A D | ftrace_64_pg.c | 399 static bool expected_nop_sequence(void *ip, ppc_inst_t op0, ppc_inst_t op1) argument 402 return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP())); 404 return ppc_inst_equal(op0, ppc_inst(PPC_RAW_BRANCH(8))) &&
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/linux-master/arch/m68k/fpsp040/ |
H A D | bugfix.S | 187 | op0. Else, or if opclass2, check for cu dest equal to 203 beqs op0 |if equal, continue bugfix 210 beqs op0 |if equal, continue bugfix 224 op0: label
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/linux-master/arch/xtensa/kernel/ |
H A D | align.S | 171 extui a0, a4, INSN_OP0, 4 # get insn.op0 nibble 233 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
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/linux-master/drivers/infiniband/hw/mthca/ |
H A D | mthca_qp.c | 1647 u8 op0 = 0; local 1795 op0 = mthca_opcode[wr->opcode]; 1810 qp->send_wqe_offset) | f0 | op0, 1951 u8 op0 = 0; local 1964 ((qp->sq.head & 0xffff) << 8) | f0 | op0; 2125 op0 = mthca_opcode[wr->opcode]; 2137 dbhi = (nreq << 24) | ((qp->sq.head & 0xffff) << 8) | f0 | op0;
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/linux-master/tools/arch/arm64/include/asm/ |
H A D | sysreg.h | 38 #define sys_reg(op0, op1, crn, crm, op2) \ 39 (((op0) << Op0_shift) | ((op1) << Op1_shift) | \ 82 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints, 317 * op0 op1 CRn CRm op2 323 * op0 op1 CRn CRm op2
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/linux-master/arch/arm64/kvm/ |
H A D | emulate-nested.c | 1753 u8 op0, op1, crn, crm, op2; local 1755 op0 = sys_reg_Op0(encoding); 1762 return sys_reg(op0, op1, crn, crm, op2 + 1); 1764 return sys_reg(op0, op1, crn, crm + 1, 0); 1766 return sys_reg(op0, op1, crn + 1, 0, 0); 1768 return sys_reg(op0, op1 + 1, 0, 0, 0); 1770 return sys_reg(op0 + 1, 0, 0, 0, 0);
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/linux-master/drivers/tty/serial/ |
H A D | mpc52xx_uart.c | 160 out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS); 933 out_8(&PSC_5125(port)->op0, MPC52xx_PSC_OP_RTS);
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