Searched refs:mmSDMA3_RLC5_CONTEXT_STATUS_BASE_IDX (Results 1 - 2 of 2) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h12438 #define mmSDMA3_RLC5_CONTEXT_STATUS_BASE_IDX macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/sdma3/
H A Dsdma3_4_2_2_offset.h825 #define mmSDMA3_RLC5_CONTEXT_STATUS_BASE_IDX 1 macro

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