Searched refs:mmMP1_SMN_C2PMSG_90 (Results 1 - 15 of 15) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu9_smumgr.c | 76 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
83 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
123 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
153 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
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| H A D | smu10_smumgr.c | 54 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
59 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
85 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
103 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
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| H A D | vega20_smumgr.c | 75 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
80 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
112 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
138 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
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| /linux-master/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_9_0_offset.h | 310 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| H A D | mp_10_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| H A D | mp_12_0_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| H A D | mp_11_0_8_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| H A D | mp_11_0_offset.h | 300 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| H A D | mp_11_5_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_4_ppt.c | 52 #define mmMP1_SMN_C2PMSG_90 0x029a macro
1143 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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| H A D | smu_v13_0.c | 70 #define mmMP1_SMN_C2PMSG_90 0x029a macro
2439 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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| H A D | smu_v13_0_0_ppt.c | 79 #define mmMP1_SMN_C2PMSG_90 0x029a macro
2858 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 50 #define mmMP1_SMN_C2PMSG_90 0x029a macro
1481 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_0_ppt.c | 52 #define mmMP1_SMN_C2PMSG_90 0x029a macro
1459 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 2201 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
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