#
132a6a78 |
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18-Jan-2024 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amdgpu/pm: Use macro definitions in the smu IH process function Replace the hard-coded numbers with macro definition Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1e201202 |
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21-Jan-2024 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amdgpu/pm: Add default case for smu IH process func Add default case for smu IH process func. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
42ffb3c3 |
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16-Jan-2024 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amdgpu/pm: Fix the power source flag error The power source flag should be updated when [1] System receives an interrupt indicating that the power source has changed. [2] System resumes from suspend or runtime suspend Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ca1ffb17 |
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16-Jan-2024 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amdgpu/pm: Fix the power source flag error The power source flag should be updated when [1] System receives an interrupt indicating that the power source has changed. [2] System resumes from suspend or runtime suspend Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
18df969b |
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11-Dec-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.0 Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature. -- v10->v11: - downgrade the prompt level on message failure(Lijo) v13: - Fix the format issue (IIpo Jarvinen) - Move function smu_v13_0_0_set_wbrf_exclusion_ranges to smu_v13_0.c as a generic code for later use (IIpo Jarvinen) Co-developed-by: Evan Quan <quanliangl@hotmail.com> Signed-off-by: Evan Quan <quanliangl@hotmail.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
31e6af1f |
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02-Nov-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd/pm: Remove redundant function members of pptable_funcs Remove redundant functions members of pptable_funcs and change the function type as static because they are not called by other files. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5ce8eccd |
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08-Nov-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd/pm: Make smu_v13_0_baco_set_armd3_sequence() static smu_v13_0_baco_set_armd3_sequence is not used by other files, so make it as static type. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
857c838c |
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02-Nov-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd/pm: Move some functions to smu_v13_0.c as generic code Use generic functions and remove the duplicate code Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5f38ac54 |
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24-Oct-2023 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: fix the high voltage and temperature issue fix the high voltage and temperature issue after the driver is unloaded on smu 13.0.0, smu 13.0.7 and smu 13.0.10 v2 - fix the code format and make sure it is used on the unload case only. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
406e8845 |
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24-Oct-2023 |
Lin.Cao <lincao12@amd.com> |
drm/amd: check num of link levels when update pcie param In SR-IOV environment, the value of pcie_table->num_of_link_levels will be 0, and num_of_levels - 1 will cause array index out of bounds Signed-off-by: Lin.Cao <lincao12@amd.com> Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fbf1035b |
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23-Oct-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Disable PP_PCIE_DPM_MASK when dynamic speed switching not supported Rather than individual ASICs checking for the quirk, set the quirk at the driver level. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
de7f3c4e |
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09-Oct-2023 |
Tim Huang <Tim.Huang@amd.com> |
drm/amd/pm: wait for completion of the EnableGfxImu command Wait for completion of sending the EnableGfxImu message when using the PSP FW loading. Signed-off-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b8e6aec1 |
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29-Sep-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Drop all hand-built MIN and MAX macros in the amdgpu base driver Several files declare MIN() or MAX() macros that ignore the types of the values being compared. Drop these macros and switch to min() min_t(), and max() from `linux/minmax.h`. Suggested-by: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7752ccf8 |
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29-Sep-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Update `update_pcie_parameters` functions to use uint8_t arguments The matching values for `pcie_gen_cap` and `pcie_width_cap` when fetched from powerplay tables are 1 byte, so narrow the arguments to match to ensure min() and max() comparisons without casts. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e8303cf |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5465e7b8 |
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14-Aug-2023 |
Bokun Zhang <bokun.zhang@amd.com> |
drm/amdgpu/pm: Add notification for no DC support - There is a DPM issue where if DC is not present, FCLK will stay at low level. We need to send a SMU message to configure the DPM - Reuse smu_v13_0_notify_display_change() for this purpose Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Bokun Zhang <bokun.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
89df3dbe |
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14-Aug-2023 |
Bokun Zhang <bokun.zhang@amd.com> |
drm/amdgpu/pm: Add notification for no DC support - There is a DPM issue where if DC is not present, FCLK will stay at low level. We need to send a SMU message to configure the DPM - Reuse smu_v13_0_notify_display_change() for this purpose Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Bokun Zhang <bokun.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f1d1abd6 |
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10-Aug-2023 |
Asad Kamal <asad.kamal@amd.com> |
drm/amd/pm: Update pci link speed for smu v13.0.6 Update pcie link speed registers for smu v13.0.6 & populate gpu metric table with pcie link speed rather than gen for smu v13_0_0, smu v13_0_6 & smu v13_0_7 v2: Update ESM register address Used macro to convert pcie gen to speed v3: Chaged macro to inline function for pcie gen to speed Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e49311c4 |
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15-Aug-2023 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: allow the user to force BACO on smu v13.0.0/7 allow the user to force BACO on smu v13.0.0/7 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e215e10 |
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31-Jul-2023 |
Ran Sun <sunran001@208suo.com> |
drm/amd/pm: Clean up errors in smu_v13_0.c Fix the following errors reported by checkpatch: ERROR: space required before the open parenthesis '(' ERROR: that open brace { should be on the previous line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5d1eb4c4 |
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07-Jul-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Move helper for dynamic speed switch check out of smu13 This helper is used for checking if the connected host supports the feature, it can be moved into generic code to be used by other smu implementations as well. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c2e3f5b5 |
|
07-Jul-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/pm: conditionally disable pcie lane/speed switching for SMU13 Intel platforms such as Sapphire Rapids and Raptor Lake don't support dynamic pcie lane or speed switching. This limitation seems to carry over from one generation to another. To be safer, disable dynamic pcie lane width and speed switching when running on an Intel platform. Link: https://edc.intel.com/content/www/us/en/design/products/platforms/details/raptor-lake-s/13th-generation-core-processors-datasheet-volume-1-of-2/005/pci-express-support/ Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2663 Co-developed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9df88c81 |
|
07-Jul-2023 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: share the code around SMU13 pcie parameters update So that SMU13.0.0 and SMU13.0.7 do not need to have one copy each. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
18862307 |
|
07-Jul-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Move helper for dynamic speed switch check out of smu13 This helper is used for checking if the connected host supports the feature, it can be moved into generic code to be used by other smu implementations as well. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
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#
31c7a3b3 |
|
07-Jul-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/pm: conditionally disable pcie lane/speed switching for SMU13 Intel platforms such as Sapphire Rapids and Raptor Lake don't support dynamic pcie lane or speed switching. This limitation seems to carry over from one generation to another. To be safer, disable dynamic pcie lane width and speed switching when running on an Intel platform. Link: https://edc.intel.com/content/www/us/en/design/products/platforms/details/raptor-lake-s/13th-generation-core-processors-datasheet-volume-1-of-2/005/pci-express-support/ Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2663 Co-developed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
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#
dcb489ba |
|
07-Jul-2023 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: share the code around SMU13 pcie parameters update So that SMU13.0.0 and SMU13.0.7 do not need to have one copy each. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
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#
b75efe88 |
|
04-May-2023 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid unintentional shutdown due to temperature momentary fluctuation An intentional delay is added on soft ctf triggered. Then there will be a double check for the GPU temperature before taking further action. This can avoid unintended shutdown due to temperature momentary fluctuation. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8f4f5f0b |
|
10-Apr-2023 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: fulfill SMU13 OD settings init and restore Gfxclk fmin/fmax, Uclk fmin/fmax and Gfx v/f curve voltage offset OD settings are supported for SMU13. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3c87de6d |
|
31-Mar-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Fix power context allocation in SMU13 Use the right data structure for allocation. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9661bf68 |
|
21-Feb-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Keep interface version in PMFW header Use the interface version directly from PMFW interface header file rather than keeping another definition in common smu13 file. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1d13c49c |
|
31-Mar-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Fix power context allocation in SMU13 Use the right data structure for allocation. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
8d9cdb46 |
|
14-Apr-2023 |
Tom Rix <trix@redhat.com> |
drm/amd/pm: change pmfw_decoded_link_width, speed variables to globals gcc with W=1 reports In file included from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0.c:36: ./drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v13_0.h:66:18: error: ‘pmfw_decoded_link_width’ defined but not used [-Werror=unused-const-variable=] 66 | static const int pmfw_decoded_link_width[7] = {0, 1, 2, 4, 8, 12, 16}; | ^~~~~~~~~~~~~~~~~~~~~~~ ./drivers/gpu/drm/amd/amdgpu/../pm/swsmu/inc/smu_v13_0.h:65:18: error: ‘pmfw_decoded_link_speed’ defined but not used [-Werror=unused-const-variable=] 65 | static const int pmfw_decoded_link_speed[5] = {1, 2, 3, 4, 5}; | ^~~~~~~~~~~~~~~~~~~~~~~ These variables are defined and used in smu_v13_0_7_ppt.c and smu_v13_0_0_ppt.c. There should be only one definition. So define the variables as globals in smu_v13_0.c Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
511a9555 |
|
02-Mar-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Add SMU 13.0.6 support Add initial SMU 13.0.6 implementation. v1: Initial implementation to support SMU 13.0.6. v2: Add driver interface version check. v3: rebase (Alex) v4: Enable i2c for avoid warning (Alex) v5: sqaush in cleanups up through (Alex) "drm/amd/pm: Ignore EIO error on SMUv13.0.6" Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
424b3d75 |
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20-Feb-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm: downgrade log level upon SMU IF version mismatch SMU IF version mismatch as a warning message exists widely after asic production, however, due to this log level setting, such mismatch warning will be caught by automation test like IGT and reported as a fake error after checking. As such mismatch does not break anything, to reduce confusion, downgrade it from dev_warn to dev_info. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
edddc6fd |
|
21-Feb-2023 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the baco state setting for ArmD3 scenario The check for baco support relies on the correct baco state. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <feifei.xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
45bf7971 |
|
09-Jan-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm/smu13: BACO is supported when it's in BACO state This leverages the logic in smu11. No need to talk to SMU to check BACO enablement as it's in BACO state already. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
315d1716 |
|
03-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Use `amdgpu_ucode_*` helpers for SMU The `amdgpu_ucode_request` helper will ensure that the return code for missing firmware is -ENODEV so that early_init can fail. The `amdgpu_ucode_release` helper is for symmetry on unloading. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
755f32a3 |
|
28-Dec-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Convert SMUv13 microcode to use `amdgpu_ucode_ip_version_decode` The special case for the one dGPU has been moved into `amdgpu_ucode_ip_version_decode`, so simplify this code. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c595637f |
|
16-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the reference clock for fan speed(rpm) calculation Correct the reference clock as 25Mhz for SMU13 fan speed calculation. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7f35c54c |
|
14-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: bump SMU13.0.0 driver_if header to version 0x34 To fit the latest PMFW and suppress the warning emerged on driver loading. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e1dd28fc |
|
05-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unused SMU v13 API The API is not in use. And it's unlikely to be used in the future either. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
972fb53d |
|
09-Jan-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm/smu13: BACO is supported when it's in BACO state This leverages the logic in smu11. No need to talk to SMU to check BACO enablement as it's in BACO state already. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0, 6.1
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#
6fea8763 |
|
16-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the reference clock for fan speed(rpm) calculation Correct the reference clock as 25Mhz for SMU13 fan speed calculation. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0.x, 6.1.x
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#
272b9814 |
|
14-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: bump SMU13.0.0 driver_if header to version 0x34 To fit the latest PMFW and suppress the warning emerged on driver loading. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0, 6.1
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#
1794f6a9 |
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01-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable GPO dynamic control support for SMU13.0.0 To better support UMD pstate profilings, the GPO feature needs to be switched on/off accordingly. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0.x
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#
9f83e612 |
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11-Oct-2022 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amdgpu/pm: add GFXOFF control IP version check for SMU IP v13.0.11 Enable the SMU IP v13.0.11 GFXOFF control Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
51e7a216 |
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11-Oct-2022 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amdgpu: add smu 13 support for smu 13.0.11 this patch to add smu 13 support for smu 13.0.11. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
abd51738 |
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20-Nov-2022 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Fix minmax warning Fix minmax warning by using min_t() macro and explicitly specifying the assignment type. Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ef5fca9f |
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20-Nov-2022 |
lyndonli <Lyndon.Li@amd.com> |
drm/amdgpu: add the fan abnormal detection feature Update the SW CTF limit from existing register when there's a fan failure detected via SMU interrupt. Signed-off-by: lyndonli <Lyndon.Li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ae5a38c |
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08-Nov-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable runpm support over BACO for SMU13.0.0 Enable SMU13.0.0 runpm support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa16dec2 |
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20-Oct-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: allow gfxoff on gc_11_0_3 allow gfxoff on gc_11_0_3 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7e5632cd |
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18-Oct-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: update driver-if header for smu_v13_0_10 update driver-if header for smu_v13_0_10 and merge with smu_v13_0_0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7faf684b |
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26-Sep-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: skip loading pptable from driver on secure board for smu_v13_0_10 skip loading pptable from driver on secure board since it's loaded from psp. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Guan Yu <Guan.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e77422a5 |
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07-Sep-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: remove the pptable id override on smu_v13_0_10 remove the pptable id override on smu_v13_0_10, and the id is fetched from vbios now. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8652da45 |
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08-Nov-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable runpm support over BACO for SMU13.0.0 Enable SMU13.0.0 runpm support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0.x
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#
08841950 |
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20-Oct-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: allow gfxoff on gc_11_0_3 allow gfxoff on gc_11_0_3 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
09aef025 |
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18-Oct-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: update driver-if header for smu_v13_0_10 update driver-if header for smu_v13_0_10 and merge with smu_v13_0_0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f700486c |
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26-Sep-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: skip loading pptable from driver on secure board for smu_v13_0_10 skip loading pptable from driver on secure board since it's loaded from psp. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Guan Yu <Guan.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4c7f9a3c |
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07-Sep-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: remove the pptable id override on smu_v13_0_10 remove the pptable id override on smu_v13_0_10, and the id is fetched from vbios now. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0b844b6e |
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15-Sep-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop the pptable related workarounds for SMU 13.0.0 The pptable in the vbios is fully ready. The related workarounds in driver are not needed any more. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
72be7316 |
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22-Aug-2022 |
Yifan Zha <Yifan.Zha@amd.com> |
drm/amd: Skip smu_v13 register irq on SRIOV VF [Why] VF do not need to handle SMU IRQ state. L1 Policy will block VF access THM_THERMAL_INT_CTRL and MP1_SMN_IH_SW_INT/CNTL. [How] Skip smu_v13 init register_irq_handler under SRIOV VF. And add irq_src check in enable/disable thermal alert to avoid thermal alert enable/disable fail. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Yifan Zha <Yifan.Zha@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d9ec10c3 |
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24-Jul-2022 |
John Clements <john.clements@amd.com> |
drm/amdgpu: added supported smu 13.0.10 sw pptable added sw pptable id 6666 for smu 13.0.10 v2: fix checkpatch error (Alex) Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8e039cd1 |
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18-Mar-2022 |
Yang Wang <KevinYang.Wang@amd.com> |
drm/amd/pm: add smu_v13_0_10 driver if version add smu_v13_0_10 driver if version Signed-off-by: Yang Wang <KevinYang.Wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
92f05043 |
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25-Aug-2022 |
Yang Wang <KevinYang.Wang@amd.com> |
drm/amd/pm: add smu_v13_0_10 support add smu_v13_0_10 support. Signed-off-by: Yang Wang <KevinYang.Wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
64e32c91 |
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23-Aug-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: use vbios carried pptable for those supported SKUs For some SMU13.0.0 SKUs, the vbios carried pptable is ready to go. Use that one instead of hardcoded softpptable. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
88bab90f |
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15-Sep-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop the pptable related workarounds for SMU 13.0.0 The pptable in the vbios is fully ready. The related workarounds in driver are not needed any more. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d7e75468 |
|
23-Aug-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: use vbios carried pptable for those supported SKUs For some SMU13.0.0 SKUs, the vbios carried pptable is ready to go. Use that one instead of hardcoded softpptable. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5a0918b4 |
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11-Aug-2022 |
Tim Huang <tim.huang@amd.com> |
drm/amd/pm: Enable GFXOFF feature for SMU IP v13.0.4 The driver needs to set EnableGfxImu message parameter to tell the PMFW to set the flag that enables the GFXOFF feature. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e64b529 |
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08-Aug-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: skip pptable override for smu_v13_0_7 skip pptable override for smu_v13_0_7 secure boards only. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b7ffeb4a |
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28-Jul-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: add 3715 softpptable support for SMU13.0.0 Add support for 3715 softpptable. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
872642ed |
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08-Jul-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: drop the thermal_controller_type check drop the thermal_controller_type check since it's not relevant. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c028d66e |
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07-Jul-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: ac/dc change for smu_v13_0 fixed the issue: gpu runs in dc mode but it is expected to be in ac mode. this causes the lower performance on smu_v13_0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1320d6c7 |
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13-Jun-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Don't show warning on reading vbios values for SMU13 3.1 Some APUs with SMU13 are showing the following message: `amdgpu 0000:63:00.0: amdgpu: Unexpected and unhandled version: 3.1` This warning isn't relevant for smu info 3.1, as no bootup information is present in the table. Fixes: 593a54f18031 ("drm/amd/pm: correct the way for retrieving bootup clocks") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
272308ad |
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07-Jun-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable MACO support for SMU 13.0.0 Enable BAMACO reset support for SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d52ea3dc |
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01-Jun-2022 |
Tim Huang <tim.huang@amd.com> |
drm/amdgpu/pm: correct the firmware flag address for SMU IP v13.0.4 For SMU IP v13.0.4, the smnMP1_FIRMWARE_FLAGS address is different, we need this to correct the reading address. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d7053e63 |
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31-May-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable mode1 reset support for SMU 13.0.0 Fulfill the interfaces for mode1 reset related. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bb50bba9 |
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22-May-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unneeded thermal_controller_type check As there is actually no direct dependence between them. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
da1db031 |
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26-May-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/swsmu: add SMU mailbox registers in SMU context So we can eventaully use them in the common smu code for accessing the SMU mailboxes without needing a lot of per asic logic in the common code. Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7101ab97 |
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18-May-2022 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu/pm: implement the SMU_MSG_EnableGfxImu function GC v11_0_1 asic needs to issue the EnableGfxImu message after start IMU. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
525d6515 |
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28-Apr-2022 |
Yury Norov <yury.norov@gmail.com> |
drm/amd/pm: use bitmap_{from,to}_arr32 where appropriate The smu_v1X_0_set_allowed_mask() uses bitmap_copy() to convert bitmap to 32-bit array. This may be wrong due to endiannes issues. Fix it by switching to bitmap_{from,to}_arr32. CC: Alexander Gordeev <agordeev@linux.ibm.com> CC: Andy Shevchenko <andriy.shevchenko@linux.intel.com> CC: Christian Borntraeger <borntraeger@linux.ibm.com> CC: Claudio Imbrenda <imbrenda@linux.ibm.com> CC: David Hildenbrand <david@redhat.com> CC: Heiko Carstens <hca@linux.ibm.com> CC: Janosch Frank <frankja@linux.ibm.com> CC: Rasmus Villemoes <linux@rasmusvillemoes.dk> CC: Sven Schnelle <svens@linux.ibm.com> CC: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Yury Norov <yury.norov@gmail.com>
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#
6fd69381 |
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09-May-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the softpptable ids used for SMU 13.0.0 To better match with the pptable_id settings from VBIOS. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
33ef11cd |
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10-May-2022 |
Tim Huang <tim.huang@amd.com> |
drm/amdgpu/pm: add GFXOFF control IP version check for SMU IP v13.0.4 Enable the SMU IP v13.0.4 GFXOFF control Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a0219175 |
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06-May-2022 |
Tim Huang <tim.huang@amd.com> |
drm/amdgpu/pm: add some common ppt functions for SMU IP v13.0.x Add some common ppt functions that will be used by SMU IP v13.0.x and drop the not used function smu_v13_0_mode2_reset. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b4e7b0e8 |
|
29-Apr-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: enable gfxoff control on smu_v13_0_7 enable gfxoff control interface on smu_v13_0_7 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7c1fa0bf |
|
25-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable BACO support for SMU 13.0.0 Enable SMU 13.0.0 BACO support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cbd3adae |
|
25-Apr-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: change the soft pptable id for smu_v13_0_7 change the soft pptable id for smu_v13_0_7 according to pptable updatde Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f88fe203 |
|
07-Apr-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: add SCPM support in smu v13_0_7 port the SCPM change from smu_v13_0_0 to smu_v13_0_7 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
113cc31d |
|
21-Feb-2022 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/pm: add SMU_13_0_7 ppt_funcs for SMU_13_0_7 Add initial support for SMU 13.0.7. V2: unify ppt name, fix copyright format, add missing break (Kenneth/Evan) V3: Split PMFW headers as separate patch (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0c2a2d1c |
|
15-Apr-2022 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amdgpu/swsmu: add smu 13.0.7 firmware Declare smu 13.0.7 firmware. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
914b3087 |
|
13-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable gfx ulv feature control for SMU 13.0.0 Fulfill the interface for gfx ulv control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a5ffbfa0 |
|
13-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable deep sleep features control for SMU 13.0.0 Fulfill the interface for deep sleep features control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
93661c1d |
|
31-Mar-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: enable RunDcBtc support for SMU 13.0.0 Fulfill the RunDcBtc for SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
276c03a0 |
|
06-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/smu: Update SMU13 support for SMU 13.0.0 Modify the common smu13 code and add a new smu 13.0.0 ppt file to handle the smu 13.0.0 specific configuration. v2: squash in typo fix in profile name Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
593a54f1 |
|
24-Feb-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the way for retrieving bootup clocks The bootup clocks can be retrieved from the smu_info table. That is light-weight compared with existing way. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2913b567 |
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28-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amd/smu: Increace dpm level count only for smu v13.0.2 Only V13.0.2 on SMU v13 will get 0 based max level from fw and increment by one, other ASIC will not need for this. V2: replace the asic_type check with ip versioning check. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d7709eb6 |
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01-Mar-2022 |
Prike Liang <Prike.Liang@amd.com> |
drm/amdgpu: enable gfxoff routine for GC 10.3.7 Enable gfxoff routine for GC 10.3.7. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
111aeed2 |
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07-Feb-2022 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amdgpu: add gfxoff support for smu 13.0.5 this patch adds gfxoff support for smu 13.0.5 Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
068ea8bd |
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21-Jan-2022 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amd/pm: add smu_v13_0_5_ppt implementation this patch adds smu_v13_0_5_ppt implementation. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
db090ff8 |
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12-Nov-2021 |
Prike Liang <Prike.Liang@amd.com> |
drm/amd/pm: Add support for MP1 13.0.8 Set smu sw function and enable swSMU support for MP1. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3c6591e9 |
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08-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop the cache for enabled ppfeatures The following scenarios make the driver cache for enabled ppfeatures outdated and invalid: - Other tools interact with PMFW to change the enabled ppfeatures. - PMFW may enable/disable some features behind driver's back. E.g. for sienna_cichild, on gfxoff entering, PMFW will disable gfx related DPM features. All those are performed without driver's notice. Also considering driver does not actually interact with PMFW such frequently, the benefit brought by such cache is very limited. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ade3ca9 |
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07-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the usage for 'supported' member of smu_feature structure The supported features should be retrieved just after EnableAllDpmFeatures message complete. And the check(whether some dpm feature is supported) is only needed when we decide to enable or disable it. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2d282665 |
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07-Dec-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: update the data type for retrieving enabled ppfeatures Use uint64_t instead of an array of uint32_t. This can avoid some non-necessary intermediate uint32_t -> uint64_t conversions. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1f2cf08a |
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28-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unneeded feature->mutex As all those related APIs are already well protected by adev->pm.mutex. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
82890466 |
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18-Jan-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Fix MSB of SMU version printing Yellow carp has been outputting versions like `1093.24.0`, but this is supposed to be 69.24.0. That is the MSB is being interpreted incorrectly. The MSB is not part of the major version, but has generally been treated that way thus far. It's actually the program, and used to distinguish between two programs from a similar family but different codebase. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3bce90bf |
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23-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop unnecessary gfxoff controls Those gfxoff controls added for some specific ASICs are unnecessary. The functionalities are not affected without them. Also to align with other ASICs, they should also be dropped. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ebfc2533 |
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21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose the smu_context structure used internally in power This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev->powerplay.pp_handle. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0ff76b53 |
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14-Dec-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/pm: restore SMU version print statement for dGPUs This is still needed for thoes in case the firmware fails to load then the message is the only way to tell what firmware was on them Suggested-by: Lijo Lazar <lijo.Lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9f952378 |
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13-Dec-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drivers/amd/pm: smu13: use local variable adev Since this variable was made available by the previous commit, use it to make function access cleaner. Suggested-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ff7ac852 |
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13-Dec-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drivers/amd/pm: drop statement to print FW version for smu_v13 Update smu_v13 to match smu_v12 and smu_v11 behavior where this is fetched from debugfs rather than in kernel logs on every boot. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6f072a84 |
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08-Dec-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/pm: fix reading SMU FW version from amdgpu_firmware_info on YC This value does not get cached into adev->pm.fw_version during startup for smu13 like it does for other SMU like smu12. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
edd79420 |
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16-Nov-2021 |
Stanley.Yang <Stanley.Yang@amd.com> |
drm/amd/pm: add message smu to get ecc_table v2 support ECC TABLE message, this table include umc ras error count and error address v2: add smu version check to query whether support ecctable call smu_cmn_update_table to get ecctable directly Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ebd8bf0 |
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12-Nov-2021 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: support new mode-1 reset interface (v2) If gpu reset is triggered by ras fatal error, tell it to smu in mode-1 reset message. v2: move mode-1 reset function to aldebaran_ppt.c since it's aldebaran specific currently. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dcd10d87 |
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08-Dec-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/pm: fix reading SMU FW version from amdgpu_firmware_info on YC This value does not get cached into adev->pm.fw_version during startup for smu13 like it does for other SMU like smu12. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
2d1ac1cb |
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18-Aug-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: (v2) add limit_type to (pptable_funcs)->set_power_limit signature v2 add check for SMU_DEFAULT_PPT_LIMIT v1 modify (pptable_funcs)->set_power_limit signature modify smu11 set_power_limit signature (arcturus, navi10, sienna_cichlid) modify smu13 set_power_limit signature (aldabaran) modify vangogh_set_power_limit signature (vangogh) === Test === sudo bash AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} LOGFILE=pp_show_power_cap.log cp $LOGFILE{,.old} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES=" power1_cap power2_cap" for f in $FILES do if test -f "$HWMON_DIR/$f"; then echo === $f === >> $LOGFILE cat $HWMON_DIR/$f >> $LOGFILE RESTORE_VALUE=`cat $HWMON_DIR/$f` 2>&1 >> $LOGFILE echo RESTORE_VALUE $RESTORE_VALUE >> $LOGFILE echo 120000000 > $HWMON_DIR/$f sleep 3 cat $HWMON_DIR/$f >> $LOGFILE echo $RESTORE_VALUE > $HWMON_DIR/$f sleep 3 cat $HWMON_DIR/$f >> $LOGFILE else echo === $f === >> $LOGFILE echo File Not Found >> $LOGFILE fi done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1d789535 |
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04-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: convert IP version array to include instances Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
61b396b9 |
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20-Aug-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/pm/smu_v13.0: convert IP version checking Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c94126c4 |
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17-Aug-2021 |
Colin Ian King <colin.king@canonical.com> |
drm/amd/pm: Fix spelling mistake "firwmare" -> "firmware" There is a spelling mistake in a dev_err error message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4a1cac25 |
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11-Aug-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amd/pm: skip to load smu microcode on sriov for aldebaran v1: 1. skip to load smu firmware in sriov mode for aldebaran chip 2. using vbios pptable if in sriov mode. v2: clean up smu driver code in sriov code path Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dde58645 |
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01-Jul-2021 |
Xiaomeng Hou <Xiaomeng.Hou@amd.com> |
drm/amd/pm: drop smu_v13_0_1.c|h files for yellow carp Since there's nothing special in smu implementation for yellow carp, it's better to reuse the common smu_v13_0 interfaces and drop the specific smu_v13_0_1.c|h files. v2: remove the duplicate register offset and shift mask header files as well. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
21cf0293 |
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01-Jul-2021 |
Xiaomeng Hou <Xiaomeng.Hou@amd.com> |
drm/amd/pm: drop smu_v13_0_1.c|h files for yellow carp Since there's nothing special in smu implementation for yellow carp, it's better to reuse the common smu_v13_0 interfaces and drop the specific smu_v13_0_1.c|h files. v2: remove the duplicate register offset and shift mask header files as well. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e943dd88 |
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13-May-2021 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Fix showing incorrect frequencies on aldebaran v1: Use the current and custom pstate frequencies to track the current and user-set min/max values in manual and determinism mode. Previously, only actual_* value was used to track the currrent and user requested value. The value will get reassigned whenever user requests a new value with pp_od_clk_voltage node. Hence it will show incorrect values when user requests an invalid value or tries a partial request without committing the values. Separating out to custom and current variable fixes such issues. v2: Remove redundant if-else check Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
96381e3a |
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11-Apr-2021 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Use VBIOS PPTable for aldebaran Keep the logic to force-use VBIOS PPTable in aldebaran rather than in generic SMU13. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f41f8e08 |
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25-Mar-2021 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Fix DPM level count on aldebaran Firmware returns zero-based max level, increment by one to get total levels. This fixes the issue of not showing all levels and current frequency when frequency is at max DPM level. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c941e9fe |
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16-Mar-2021 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Add support for reset completion on aldebaran v1: On aldebaran, after hardware context restore, another handshake needs to happen with PMFW so that reset recovery is complete from PMFW side. Treat this as RESET_COMPLETE event for aldebaran. v2: Cleanup coding style, info logs Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e42569d0 |
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16-Mar-2021 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Modify mode2 msg sequence on aldebaran v1: During mode2 reset, PCI space is lost after message is sent. Restore PCI space before waiting for response from firmware. v2: Move mode2 sequence to aldebaran and update PMFW version. Handle generic sequence in smu13 without PMFW version check. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dd67d7a6 |
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23-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/pm: mark pcie link/speed arrays as const They are read only. Noticed-by: Dave Airlie <airlied@linux.ie> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bea9cd3f |
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05-Mar-2021 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: add new data in metrics table Export new data in the metrics table for gfx and memory utilization counter, and each hbm temperature as well. v2: change the metrics table version to v1.1 v3: fix the coding style v4: rebase against latest kernel Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
acdd5b72 |
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28-Nov-2020 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Remove CPU virtual address notification in aldebaran PPSMC_MSG_SetSystemVirtualDramAddrHigh/Low messages are not handled by PMFW in aldebaran Signed-off-by: Lijo Lazar <Lijo.Lazar@amd.com> Reviewed-by: Kenneth Feng <Kenneth.Feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f1adbe03 |
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28-Nov-2020 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amd/pm: Add support to override pptable id for aldebaran Temporarily force to use BU PPTable defined in VBIOS. Add support to override PPTable defined by module parameter.Add FW reported version to kernel log. Signed-off-by: Lijo Lazar <Lijo.Lazar@amd.com> Reviewed-by: Kenneth Feng <Kenneth.Feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e5a83213 |
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08-Dec-2020 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu: update atom_firmware_info_v3_4 (v2) v1: Added some pspbl parameters v2: fix fallthrough issue Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lazar Lijo <Lijo.Lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3d01361c |
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26-Nov-2020 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/pm:add aldebaran support for getting bootup values for SMU config. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5c03e584 |
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19-Nov-2020 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu:add smu mode1/2 support for aldebaran Use MSG_GfxDriverReset for mode reset and retire MSG_Mode1Reset. Centralize soc15_asic_mode1_reset() and nv_asic_mode1_reset()functions. Add mode2_reset_is_support() for smu->ppt_funcs. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c05d1c40 |
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20-Oct-2020 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amd/swsmu: add aldebaran smu13 ip support (v3) Add initial swSMU support. v1: add smu13 ip support for aldebaran asic (Kevin/Kenneth) v2: switch to thm/mp v13_0 ip headers (Hawking) v3: squash in updates (Alex) Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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