Searched refs:mmMP1_SMN_C2PMSG_82 (Results 1 - 15 of 15) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu9_smumgr.c | 154 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);
173 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| H A D | smu10_smumgr.c | 76 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);
105 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);
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| H A D | vega20_smumgr.c | 140 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);
155 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| /linux-master/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_9_0_offset.h | 294 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_10_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_12_0_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_0_8_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_0_offset.h | 284 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_5_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_4_ppt.c | 49 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
1141 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| H A D | smu_v13_0.c | 67 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
2437 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| H A D | smu_v13_0_0_ppt.c | 76 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
2856 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 47 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
1479 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_0_ppt.c | 49 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
1457 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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| /linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 2199 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
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