Searched refs:mmGCVM_L2_PROTECTION_FAULT_CNTL (Results 1 - 5 of 5) sorted by last modified time
| /linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 3213 #define mmGCVM_L2_PROTECTION_FAULT_CNTL 0x15e8 macro
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| H A D | gc_10_3_0_offset.h | 3116 #define mmGCVM_L2_PROTECTION_FAULT_CNTL 0x15c4 macro
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| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 338 SOC15_REG_ENTRY_STR(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL),
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| H A D | gfxhub_v2_1.c | 428 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
458 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
487 SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
594 adev->gmc.VM_L2_PROTECTION_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
629 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL);
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| H A D | gfxhub_v2_0.c | 397 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
427 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
456 SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
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