Searched refs:mmCP_DMA_WATCH1_ADDR_HI (Results 1 - 2 of 2) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h5101 #define mmCP_DMA_WATCH1_ADDR_HI 0x1ec5 macro
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H A Dgc_10_3_0_offset.h4758 #define mmCP_DMA_WATCH1_ADDR_HI 0x1ec5 macro
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