Searched refs:min_clock_in_sr (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.h157 uint32_t min_clock_in_sr; member in struct:smu7_display_timing
H A Dvega10_hwmgr.h168 uint32_t min_clock_in_sr; member in struct:vega10_display_timing
H A Dvega12_hwmgr.h146 uint32_t min_clock_in_sr; member in struct:vega12_display_timing
H A Dvega20_hwmgr.h200 uint32_t min_clock_in_sr; member in struct:vega20_display_timing
H A Dsmu7_hwmgr.c4107 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR &&
4109 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK))
4692 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
4693 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||
H A Dvega12_hwmgr.c2622 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr)
H A Dvega20_hwmgr.c3916 (data->display_timing.min_clock_in_sr !=
H A Dvega10_hwmgr.c5038 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr)
/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c931 data->display_timing.min_clock_in_sr =
938 data->display_timing.min_clock_in_sr);
H A Dtonga_smumgr.c658 data->display_timing.min_clock_in_sr =
665 data->display_timing.min_clock_in_sr);
H A Dfiji_smumgr.c974 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;
H A Dvegam_smumgr.c839 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;
H A Dpolaris10_smumgr.c993 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;

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