Searched refs:link_bw (Results 1 - 25 of 25) sorted by relevance

/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Doutp.h47 u32 link_bw; member in struct:nvif_outp::__anon741::__anon744::__anon748
108 u8 lttprs, u8 link_nr, u32 link_bw, bool mst, bool post_lt_adj,
H A Dif0012.h38 __u32 link_bw; member in struct:nvif_outp_args::nvif_outp_v0::__anon731::__anon735
242 __u32 link_bw; member in struct:nvif_outp_dp_train_args::nvif_outp_dp_train_v0
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Ddcb.c147 outp->dpconf.link_bw = 0x06;
150 outp->dpconf.link_bw = 0x0a;
153 outp->dpconf.link_bw = 0x14;
157 outp->dpconf.link_bw = 0x1e;
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Daux.h17 int (*lnk_ctl)(struct nvkm_i2c_aux *, int link_nr, int link_bw,
H A Danx9805.c193 int link_nr, int link_bw, bool enh)
201 link_nr, link_bw, enh);
203 nvkm_wri2cr(adap, aux->addr, 0xa0, link_bw);
192 anx9805_aux_lnk_ctl(struct nvkm_i2c_aux *base, int link_nr, int link_bw, bool enh) argument
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Ddcb.h49 int link_bw; member in struct:dcb_output::__anon754::__anon758
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c74 outp->dp.link_bw = 0;
152 max_rate = min_t(int, max_rate, outp->dcb->dpconf.link_bw);
171 u32 link_bw = outp->dp.rate[i].rate; local
173 if (link_bw > outp->dp.link_bw)
174 outp->dp.link_bw = link_bw;
282 nv_encoder->dcb->dpconf.link_bw);
284 nv_encoder->dp.link_bw);
558 max_rate = outp->dp.link_nr * outp->dp.link_bw;
[all...]
H A Dnouveau_encoder.h90 int link_bw; member in struct:nouveau_encoder::__anon760::__anon762
H A Dnouveau_bios.c1480 entry->dpconf.link_bw = 162000;
1483 entry->dpconf.link_bw = 270000;
1486 entry->dpconf.link_bw = 540000;
1490 entry->dpconf.link_bw = 810000;
/linux-master/drivers/gpu/drm/nouveau/nvif/
H A Doutp.c114 u8 link_nr, u32 link_bw, bool mst, bool post_lt_adj, bool retrain)
125 args.link_bw = link_bw;
132 args.link_bw);
545 outp->info.dp.link_bw = args.dp.link_bw;
113 nvif_outp_dp_train(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 lttprs, u8 link_nr, u32 link_bw, bool mst, bool post_lt_adj, bool retrain) argument
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c671 u8 link_bw, u8 rate_select)
678 if (link_bw) {
680 u8 link_config[] = { link_bw, lane_count };
707 u8 link_bw, rate_select; local
713 &link_bw, &rate_select);
726 if (!link_bw) {
735 if (link_bw)
737 link_bw);
747 intel_dp_update_link_bw_set(intel_dp, crtc_state, link_bw,
669 intel_dp_update_link_bw_set(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, u8 link_bw, u8 rate_select) argument
H A Dintel_fdi.c324 int lane, link_bw, fdi_dotclock; local
333 link_bw = intel_fdi_link_freq(i915, pipe_config);
337 lane = ilk_get_lanes_required(fdi_dotclock, link_bw,
344 link_bw,
H A Dintel_dp.h112 u8 *link_bw, u8 *rate_select);
H A Dintel_display.h454 int ilk_get_lanes_required(int target_clock, int link_bw, int bpp);
H A Dintel_dp.c1396 u8 *link_bw, u8 *rate_select)
1400 *link_bw = 0;
1404 *link_bw = drm_dp_link_rate_to_bw_code(port_clock);
1395 intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, u8 *link_bw, u8 *rate_select) argument
H A Dintel_display.c3239 int ilk_get_lanes_required(int target_clock, int link_bw, int bpp) argument
3247 return DIV_ROUND_UP(bps, link_bw * 8);
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c669 uint32_t link_bw; local
680 link_bw = dp_link_bandwidth_kbps(
683 if (req_bw <= link_bw) {
710 uint32_t link_bw; local
735 link_bw = dp_link_bandwidth_kbps(
738 if (req_bw <= link_bw) {
769 uint32_t link_bw; local
798 link_bw = dp_link_bandwidth_kbps(
801 if (req_bw <= link_bw) {
855 link_bw
[all...]
H A Dlink_dp_training.c1701 uint32_t link_bw; local
1716 link_bw = dp_link_bandwidth_kbps(link, &cur_link_settings);
1717 is_link_bw_low = (req_bw > link_bw);
1723 "%s: Link(%d) bandwidth too low after fallback req_bw(%d) > link_bw(%d)\n",
1724 __func__, link->link_index, req_bw, link_bw);
/linux-master/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c261 uint8_t link_bw; member in struct:cdv_intel_dp
356 cdv_intel_dp_link_clock(uint8_t link_bw) argument
358 if (link_bw == DP_LINK_BW_2_7)
915 intel_dp->link_bw = bws[clock];
917 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw);
920 intel_dp->link_bw, intel_dp->lane_count,
929 intel_dp->link_bw = bws[max_clock];
930 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw);
933 intel_dp->link_bw, intel_dp->lane_count,
1069 intel_dp->link_configuration[0] = intel_dp->link_bw;
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dr535.c956 r535_dp_train_target(struct nvkm_outp *outp, u8 target, bool mst, u8 link_nr, u8 link_bw) argument
967 NVVAL(NV0073_CTRL, DP_DATA, SET_LINK_BW, link_bw) |
1288 dcbE.dpconf.link_bw = 0x06;
1291 dcbE.dpconf.link_bw = 0x0a;
1294 dcbE.dpconf.link_bw = 0x14;
1297 dcbE.dpconf.link_bw = 0x1e;
1300 dcbE.dpconf.link_bw = 0x00;
1308 if (WARN_ON(!dcbE.dpconf.link_bw))
H A Duoutp.c121 outp->dp.lt.bw = args->v0.link_bw / 27000;
642 args->v0.dp.link_bw = outp->info.dpconf.link_bw * 27000;
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Di2c.h57 int nvkm_i2c_aux_lnk_ctl(struct nvkm_i2c_aux *, int link_nr, int link_bw,
/linux-master/include/drm/display/
H A Ddrm_dp_helper.h70 int drm_dp_bw_code_to_link_rate(u8 link_bw);
/linux-master/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c378 max_rate = nv_encoder->dp.link_nr * nv_encoder->dp.link_bw;
1000 outp->dp.link_bw, outp->dp.link_nr);
1609 u64 minRate = outp->dp.link_bw * 1000;
2956 outp->dcb->dpconf.link_bw = outp->outp.info.dp.link_bw;
/linux-master/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c470 /* Spec says link_bw = link_rate / 0.27Gbps */
476 int drm_dp_bw_code_to_link_rate(u8 link_bw) argument
478 switch (link_bw) {
486 /* Spec says link_rate = link_bw * 0.27Gbps */
487 return link_bw * 27000;

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