Searched refs:ep0_state (Results 1 - 25 of 26) sorted by relevance

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/linux-master/drivers/usb/musb/
H A Dmusb_gadget_ep0.c27 * It protects the ep0 request queue as well as ep0_state, not just the
489 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
545 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
610 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT;
612 musb->ep0_state = MUSB_EP0_STAGE_TX;
619 musb->ep0_state = MUSB_EP0_STAGE_RX;
654 csr, len, decode_ep0stage(musb->ep0_state));
669 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
678 switch (musb->ep0_state) {
680 musb->ep0_state
[all...]
H A Dmusb_core.h407 enum musb_g_ep0_state ep0_state; member in struct:musb
/linux-master/drivers/usb/isp1760/
H A Disp1760-udc.h60 * ep0_state: Control request state for endpoint 0
82 enum isp1760_ctrl_state ep0_state; member in struct:isp1760_udc
H A Disp1760-udc.c177 udc->ep0_state = ISP1760_CTRL_SETUP;
224 udc->ep0_state = ISP1760_CTRL_SETUP;
344 if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_OUT) {
347 udc->ep0_state);
385 if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_IN) {
388 udc->ep0_state);
735 if (udc->ep0_state != ISP1760_CTRL_SETUP) {
743 udc->ep0_state = ISP1760_CTRL_STATUS;
745 udc->ep0_state = ISP1760_CTRL_DATA_IN;
747 udc->ep0_state
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/linux-master/drivers/usb/gadget/udc/bdc/
H A Dbdc_ep.c391 switch (bdc->ep0_state) {
416 "Unknown ep0 state for queueing bd ep0_state:%s\n",
417 ep0_state_string[bdc->ep0_state]);
670 if (bdc->ep0_state == WAIT_FOR_STATUS_START) {
673 bdc->ep0_state = WAIT_FOR_STATUS_XMIT;
877 bdc->ep0_state = WAIT_FOR_SETUP;
1070 "%s ep0_state:%s\n",
1071 __func__, ep0_state_string[bdc->ep0_state]);
1077 bdc->ep0_state = WAIT_FOR_STATUS_START;
1079 bdc->ep0_state
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H A Dbdc.h430 enum bdc_ep0_state ep0_state; member in struct:bdc
H A Dbdc_core.c221 bdc->ep0_state = WAIT_FOR_SETUP;
/linux-master/drivers/usb/mtu3/
H A Dmtu3_gadget_ep0.c41 switch (mtu->ep0_state) {
150 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
152 dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
319 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
541 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
593 mtu->ep0_state = MU3D_EP0_STATE_TX_END;
629 mtu->ep0_state = MU3D_EP0_STATE_TX;
633 mtu->ep0_state = MU3D_EP0_STATE_RX;
651 dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
715 mtu->ep0_state
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H A Dmtu3.h343 enum mtu3_g_ep0_state ep0_state; member in struct:mtu3
H A Dmtu3_core.c722 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
H A Dmtu3_gadget.c638 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
/linux-master/drivers/usb/gadget/udc/
H A Dpxa25x_udc.h64 enum ep0_state { enum
98 enum ep0_state ep0state;
H A Dfsl_qe_udc.c182 udc->ep0_state = WAIT_FOR_SETUP;
647 udc->ep0_state = WAIT_FOR_SETUP;
800 && (udc->ep0_state == WAIT_FOR_SETUP)) {
838 udc->ep0_state = WAIT_FOR_SETUP;
1105 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
1252 udc->ep0_state = DATA_STATE_NEED_ZLP;
1257 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1269 switch (udc->ep0_state) {
1279 udc->ep0_state = WAIT_FOR_SETUP;
1291 udc->ep0_state
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H A Dfsl_udc_core.c1038 udc->ep0_state = WAIT_FOR_SETUP;
1267 udc->ep0_state = WAIT_FOR_SETUP;
1284 if (udc->ep0_state != DATA_STATE_XMIT)
1285 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1388 udc->ep0_state = DATA_STATE_XMIT;
1500 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1506 if (udc->ep0_state == DATA_STATE_XMIT)
1518 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1536 switch (udc->ep0_state) {
1539 udc->ep0_state
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H A Dpxa27x_udc.h388 enum ep0_state { enum
459 enum ep0_state ep0state;
H A Dmv_udc_core.c117 udc->ep0_state = WAIT_FOR_SETUP;
735 udc->ep0_state = DATA_STATE_XMIT;
927 udc->ep0_state = WAIT_FOR_SETUP;
1365 udc->ep0_state = WAIT_FOR_SETUP;
1450 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1557 udc->ep0_state = DATA_STATE_XMIT;
1705 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1715 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1735 switch (udc->ep0_state) {
1747 udc->ep0_state
[all...]
H A Dmv_udc.h197 unsigned int ep0_state; /* Endpoint zero state */ member in struct:mv_udc
H A Dmv_u3d.h266 unsigned int ep0_state; /* Endpoint zero state */ member in struct:mv_u3d
H A Dfsl_qe_udc.h336 u32 ep0_state; /* Endpoint zero state */ member in struct:qe_udc
H A Dfsl_usb2_udc.h503 u32 ep0_state; /* Endpoint zero state */ member in struct:fsl_udc
H A Dmv_u3d_core.c110 u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
787 && u3d->ep0_state == MV_U3D_STATUS_STAGE
790 u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
1417 u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
1567 u3d->ep0_state = MV_U3D_STATUS_STAGE;
/linux-master/drivers/usb/gadget/udc/aspeed-vhub/
H A Dvhub.h256 enum ep0_state { enum
303 enum ep0_state state;
/linux-master/drivers/usb/dwc2/
H A Dgadget.c1209 dev_dbg(hsotg->dev, "ep0 state:%d\n", hsotg->ep0_state);
1212 if (!(index == 0 && hsotg->ep0_state == DWC2_EP0_SETUP))
1378 switch (hsotg->ep0_state) {
1395 hsotg->ep0_state);
1501 hs->ep0_state == DWC2_EP0_DATA_OUT)
1946 hsotg->ep0_state = DWC2_EP0_STATUS_IN;
1949 hsotg->ep0_state = DWC2_EP0_DATA_IN;
1952 hsotg->ep0_state = DWC2_EP0_DATA_OUT;
2058 hsotg->ep0_state = DWC2_EP0_SETUP;
2331 hsotg->ep0_state
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H A Dcore.h1005 * @ep0_state: EP0 control transfers state
1197 enum dwc2_ep0_state ep0_state; member in struct:dwc2_hsotg
/linux-master/drivers/usb/gadget/legacy/
H A Dinode.c90 enum ep0_state { enum
125 enum ep0_state state; /* P: lock */
919 enum ep0_state state;

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