Searched refs:dram_clock_change_latency (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn10/
H A Ddcn10_fpu.c137 dcn_soc->dram_clock_change_latency = 23;
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Ddcn_calcs.h111 float dram_clock_change_latency; member in struct:dcn_bw_internal_vars
578 float dram_clock_change_latency; /*us*/ member in struct:dcn_soc_bounding_box
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c58 * RV2 delta: dram_clock_change_latency, max_num_dpp
65 .dram_clock_change_latency = 17, /*us*/
670 if ((int)(dc->dcn_soc->dram_clock_change_latency * 1000)
674 dc->dcn_soc->dram_clock_change_latency =
814 v->dram_clock_change_latency = dc->dcn_soc->dram_clock_change_latency;
1596 "dram_clock_change_latency: %f ns\n"
1630 dc->dcn_soc->dram_clock_change_latency * 1000,
1715 dc->dml.soc.dram_clock_change_latency_us = dc->dcn_soc->dram_clock_change_latency;
H A Ddcn_calc_auto.c1326 v->dram_clock_change_watermark = v->dram_clock_change_latency + v->urgent_watermark;
1334 v->writeback_dram_clock_change_watermark = v->dram_clock_change_latency + v->write_back_latency;
1337 v->writeback_dram_clock_change_watermark = v->dram_clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk;
1660 v->t_wait =dcn_bw_max3(v->dram_clock_change_latency + v->urgent_latency, v->sr_enter_plus_exit_time, v->urgent_latency);
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h54 dml_get_attr_decl(dram_clock_change_latency); variable
H A Ddisplay_mode_vba.c106 dml_get_attr_func(dram_clock_change_latency, mode_lib->vba.MinActiveDRAMClockChangeLatencySupported);

Completed in 161 milliseconds