/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega12_hwmgr.c | 618 dpm_table->dpm_levels[i].value = clk; 619 dpm_table->dpm_levels[i].enabled = true; 652 dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100; 665 dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100; 678 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; 691 dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100; 704 dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100; 717 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; 730 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; 795 dpm_table->dpm_levels[min_leve [all...] |
H A D | vega20_hwmgr.c | 575 dpm_table->dpm_levels[i].value = clk; 576 dpm_table->dpm_levels[i].enabled = true; 597 dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100; 618 dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100; 650 dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100; 677 dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100; 690 dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100; 703 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; 716 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; 762 dpm_table->dpm_levels[ [all...] |
H A D | vega10_hwmgr.c | 1238 if (i == 0 || dpm_table->dpm_levels[dpm_table->count - 1].value <= 1240 dpm_table->dpm_levels[dpm_table->count].value = 1242 dpm_table->dpm_levels[dpm_table->count].enabled = true; 1356 dpm_table->dpm_levels[dpm_table->count-1].value; 1367 dpm_table->dpm_levels[dpm_table->count-1].value; 1373 if (i == 0 || dpm_table->dpm_levels 1376 dpm_table->dpm_levels[dpm_table->count].value = 1378 dpm_table->dpm_levels[dpm_table->count].enabled = i == 0; 1388 if (i == 0 || dpm_table->dpm_levels 1391 dpm_table->dpm_levels[dpm_tabl [all...] |
H A D | smu7_hwmgr.c | 807 if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count-1].value != 809 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = 811 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = (i == 0) ? 1 : 0; 821 if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value != 823 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = 825 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = (i == 0) ? 1 : 0; 832 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; 833 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; 835 data->dpm_table.vddc_table.dpm_levels[i].enabled = true; 844 data->dpm_table.vddci_table.dpm_levels[ [all...] |
H A D | smu7_hwmgr.h | 100 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member in struct:smu7_single_dpm_table
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H A D | vega10_hwmgr.h | 136 struct vega10_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member in struct:vega10_single_dpm_table
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H A D | vega12_hwmgr.h | 109 struct vega12_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member in struct:vega12_single_dpm_table
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | arcturus_ppt.h | 49 struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER]; member in struct:arcturus_single_dpm_table
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H A D | navi10_ppt.c | 985 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 986 dpm_table->dpm_levels[0].enabled = true; 987 dpm_table->min = dpm_table->dpm_levels[0].value; 988 dpm_table->max = dpm_table->dpm_levels[0].value; 1003 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; 1004 dpm_table->dpm_levels[0].enabled = true; 1005 dpm_table->min = dpm_table->dpm_levels[0].value; 1006 dpm_table->max = dpm_table->dpm_levels[0].value; 1021 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; 1022 dpm_table->dpm_levels[ 2252 uint16_t *dpm_levels = NULL; local [all...] |
H A D | arcturus_ppt.c | 346 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 347 dpm_table->dpm_levels[0].enabled = true; 348 dpm_table->min = dpm_table->dpm_levels[0].value; 349 dpm_table->max = dpm_table->dpm_levels[0].value; 364 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; 365 dpm_table->dpm_levels[0].enabled = true; 366 dpm_table->min = dpm_table->dpm_levels[0].value; 367 dpm_table->max = dpm_table->dpm_levels[0].value; 382 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; 383 dpm_table->dpm_levels[ [all...] |
H A D | sienna_cichlid_ppt.c | 975 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 976 dpm_table->dpm_levels[0].enabled = true; 977 dpm_table->min = dpm_table->dpm_levels[0].value; 978 dpm_table->max = dpm_table->dpm_levels[0].value; 993 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; 994 dpm_table->dpm_levels[0].enabled = true; 995 dpm_table->min = dpm_table->dpm_levels[0].value; 996 dpm_table->max = dpm_table->dpm_levels[0].value; 1011 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; 1012 dpm_table->dpm_levels[ 2012 uint16_t *dpm_levels = NULL; local [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | aldebaran_ppt.h | 49 struct aldebaran_dpm_level dpm_levels[MAX_DPM_NUMBER]; member in struct:aldebaran_single_dpm_table
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H A D | smu_v13_0_7_ppt.c | 594 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 595 dpm_table->dpm_levels[0].enabled = true; 596 dpm_table->min = dpm_table->dpm_levels[0].value; 597 dpm_table->max = dpm_table->dpm_levels[0].value; 610 (dpm_table->dpm_levels[dpm_table->count - 1].value > 612 dpm_table->dpm_levels[dpm_table->count - 1].value = 618 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; 619 dpm_table->dpm_levels[0].enabled = true; 620 dpm_table->min = dpm_table->dpm_levels[0].value; 621 dpm_table->max = dpm_table->dpm_levels[ [all...] |
H A D | aldebaran_ppt.c | 326 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 327 dpm_table->dpm_levels[0].enabled = true; 328 dpm_table->min = dpm_table->dpm_levels[0].value; 329 dpm_table->max = dpm_table->dpm_levels[0].value; 337 dpm_table->dpm_levels[0].value = pptable->GfxclkFmin; 338 dpm_table->dpm_levels[0].enabled = true; 339 dpm_table->dpm_levels[1].value = pptable->GfxclkFmax; 340 dpm_table->dpm_levels[1].enabled = true; 341 dpm_table->min = dpm_table->dpm_levels[0].value; 342 dpm_table->max = dpm_table->dpm_levels[ [all...] |
H A D | smu_v13_0_0_ppt.c | 587 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 588 dpm_table->dpm_levels[0].enabled = true; 589 dpm_table->min = dpm_table->dpm_levels[0].value; 590 dpm_table->max = dpm_table->dpm_levels[0].value; 612 (dpm_table->dpm_levels[dpm_table->count - 1].value > 614 dpm_table->dpm_levels[dpm_table->count - 1].value = 620 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; 621 dpm_table->dpm_levels[0].enabled = true; 622 dpm_table->min = dpm_table->dpm_levels[0].value; 623 dpm_table->max = dpm_table->dpm_levels[ [all...] |
H A D | smu_v13_0_6_ppt.c | 680 dpm_table->dpm_levels[0].value = gfxclkmin; 681 dpm_table->dpm_levels[0].enabled = true; 682 dpm_table->dpm_levels[1].value = gfxclkmax; 683 dpm_table->dpm_levels[1].enabled = true; 684 dpm_table->min = dpm_table->dpm_levels[0].value; 685 dpm_table->max = dpm_table->dpm_levels[1].value; 688 dpm_table->dpm_levels[0].value = pptable->MinGfxclkFrequency; 689 dpm_table->dpm_levels[0].enabled = true; 690 dpm_table->min = dpm_table->dpm_levels[0].value; 691 dpm_table->max = dpm_table->dpm_levels[ [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | ci_dpm.c | 2514 pi->dpm_table.sclk_table.dpm_levels[i].value, 2515 pi->dpm_table.mclk_table.dpm_levels[j].value, 2573 if (dpm_table->dpm_levels[i-1].enabled) 2591 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; 2593 r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); 3247 dpm_table->sclk_table.dpm_levels[i].value, 3293 if (dpm_table->mclk_table.dpm_levels[i].value == 0) 3296 dpm_table->mclk_table.dpm_levels[i].value, 3338 dpm_table->dpm_levels[i].enabled = false; 3344 dpm_table->dpm_levels[inde [all...] |
H A D | ci_dpm.h | 65 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member in struct:ci_single_dpm_table
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/ |
H A D | smu_v14_0.h | 67 struct smu_14_0_dpm_clk_level dpm_levels[MAX_DPM_LEVELS]; member in struct:smu_14_0_dpm_table
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H A D | smu_v11_0.h | 93 struct smu_11_0_dpm_clk_level dpm_levels[MAX_DPM_LEVELS]; member in struct:smu_11_0_dpm_table
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H A D | smu_v13_0.h | 81 struct smu_13_0_dpm_clk_level dpm_levels[MAX_DPM_LEVELS]; member in struct:smu_13_0_dpm_table
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 838 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; 840 dpm_table->pcie_speed_table.dpm_levels[i].param1); 1024 dpm_table->sclk_table.dpm_levels[i].value, 1235 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), 1239 dpm_table->mclk_table.dpm_levels[i].value, 1316 data->dpm_table.sclk_table.dpm_levels[0].value; 1374 data->dpm_table.mclk_table.dpm_levels[0].value; 1395 data->dpm_table.mclk_table.dpm_levels[0].value, 1535 data->dpm_table.sclk_table.dpm_levels[i].value, 1536 data->dpm_table.mclk_table.dpm_levels[ [all...] |
H A D | iceland_smumgr.c | 774 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; 776 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); 982 dpm_table->sclk_table.dpm_levels[i].value, 1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), 1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, 1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, 1625 data->dpm_table.mclk_table.dpm_levels[j].value, 1764 data->dpm_table.mclk_table.dpm_levels[i].value,
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H A D | polaris10_smumgr.c | 827 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; 829 dpm_table->pcie_speed_table.dpm_levels[i].param1); 1070 dpm_table->sclk_table.dpm_levels[i].value, 1084 dpm_table->sclk_table.dpm_levels[0].value, 1091 dividers.real_clock < dpm_table->sclk_table.dpm_levels[0].value ? 1224 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), 1228 dpm_table->mclk_table.dpm_levels[i].value, 1340 data->dpm_table.mclk_table.dpm_levels[0].value, 1501 hw_data->dpm_table.sclk_table.dpm_levels[i].value, 1502 hw_data->dpm_table.mclk_table.dpm_levels[ [all...] |
H A D | vegam_smumgr.c | 581 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; 583 dpm_table->pcie_speed_table.dpm_levels[i].param1); 891 dpm_table->sclk_table.dpm_levels[i].value, 1050 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), 1054 dpm_table->mclk_table.dpm_levels[i].value, 1290 hw_data->dpm_table.sclk_table.dpm_levels[i].value, 1291 hw_data->dpm_table.mclk_table.dpm_levels[j].value,
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