Searched refs:dml_floor (Results 1 - 21 of 21) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddml_inline_defs.h72 static inline double dml_floor(double a, double granularity) function
81 return dml_floor(a + round_pt, 1);
H A Ddml1_display_rq_dlg_calc.c136 double prefill = dml_floor(vinit, 1);
177 double prefill = dml_floor(vinit, 1);
522 log2_dpte_row_height_linear = dml_floor(
849 log2_dpte_row_height_linear = dml_floor(
1349 dst_y_prefetch = dml_floor(4.0 * (dst_y_prefetch + 0.125), 1) / 4;
1461 dst_y_per_vm_vblank = dml_floor(4.0 * (dst_y_per_vm_vblank + 0.125), 1) / 4.0;
1465 dst_y_per_row_vblank = dml_floor(4.0 * (dst_y_per_row_vblank + 0.125), 1) / 4.0;
1689 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(
1692 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(
1728 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c658 DETBufferSizeY[k] = dml_floor(DETBufferSizeInKByte[k] * 1024 * 2 / 3, 1024);
795 dml_floor(ViewportXStart[k] +
799 dml_floor(ViewportXStart[k],
811 dml_floor(ViewportXStartC[k] + SwathWidthC[k] +
814 dml_floor(ViewportXStartC[k],
830 swath_width_luma_ub[k] = dml_min(surface_height_ub_l, dml_floor(ViewportYStart[k] +
833 dml_floor(ViewportYStart[k], Read256BytesBlockHeightY[k]));
842 dml_floor(ViewportYStartC[k] + SwathWidthC[k] +
845 dml_floor(ViewportYStartC[k],
1116 dml_floor((doubl
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H A Ddisplay_rq_dlg_calc_32.c137 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(pte_row_height_linear), 1) - 3;
146 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(p1_pte_row_height_linear), 1) - 3;
520 dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l, 1);
521 dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, 1);
522 dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, 1);
523 dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, 1);
H A Ddisplay_mode_vba_32.c698 dml_floor((mode_lib->vba.VTotal[k] - mode_lib->vba.VActive[k]) / 2.0, 1.0) :
1442 v->MIN_DST_Y_NEXT_START[k] = ((isInterlaceTiming ? dml_floor((mode_lib->vba.VTotal[k] -
1448 + dml_floor(4.0 * v->TSetup[k] / (mode_lib->vba.HTotal[k]
1454 / mode_lib->vba.HTotal[k]) <= (isInterlaceTiming ? dml_floor((mode_lib->vba.VTotal[k]
2964 dml_floor((mode_lib->vba.VTotal[k] -
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_util.h39 __DML_DLL_EXPORT__ dml_float_t dml_floor(dml_float_t x, dml_float_t granularity);
H A Ddml_display_rq_dlg_calc.c135 rq_regs->rq_regs_l.pte_row_height_linear = (dml_uint_t)(dml_floor(dml_log2((dml_float_t) pte_row_height_linear), 1) - 3);
142 rq_regs->rq_regs_c.pte_row_height_linear = (dml_uint_t)(dml_floor(dml_log2((dml_float_t) p1_pte_row_height_linear), 1) - 3);
482 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (dml_uint_t)dml_floor(refcyc_per_line_delivery_pre_l, 1);
483 disp_dlg_regs->refcyc_per_line_delivery_l = (dml_uint_t)dml_floor(refcyc_per_line_delivery_l, 1);
484 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (dml_uint_t)dml_floor(refcyc_per_line_delivery_pre_c, 1);
485 disp_dlg_regs->refcyc_per_line_delivery_c = (dml_uint_t)dml_floor(refcyc_per_line_delivery_c, 1);
H A Ddisplay_mode_core.c1141 *p->DSTYAfterScaler = (dml_uint_t)(dml_floor(s->DSTTotalPixelsAfterScaler / p->myPipe->HTotal, 1));
1253 s->dst_y_prefetch_equ = dml_floor(4.0 * (s->dst_y_prefetch_equ + 0.125), 1) / 4.0;
1419 *p->DestinationLinesToRequestVMInVBlank = dml_floor(4.0 * s->TimeForFetchingMetaPTE / s->LineTime, 1.0) / 4.0;
1420 *p->DestinationLinesToRequestRowInVBlank = dml_floor(4.0 * s->TimeForFetchingRowInVBlank / s->LineTime, 1.0) / 4.0;
2085 return VCOSpeed * 4.0 / dml_floor(VCOSpeed * 4.0 / Clock, 1.0);
2188 detile_buf_vp_horz_limit = dml_floor(detile_buf_vp_horz_limit - 1, 16);
2189 detile_buf_vp_vert_limit = dml_floor(detile_buf_vp_vert_limit - 1, 16);
2402 *VInitPreFill = (dml_uint_t)(dml_floor((VRatio + (dml_float_t) VTaps + 1) / 2.0, 1));
2404 *VInitPreFill = (dml_uint_t)(dml_floor((VRatio + (dml_float_t) VTaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1));
2501 *meta_row_width = (dml_uint_t)(dml_floor(ViewportXStar
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H A Ddisplay_mode_util.c116 dml_float_t dml_floor(dml_float_t x, dml_float_t granularity) function
187 double floor = dml_floor(val, 1);
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c176 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(
182 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(
608 log2_dpte_row_height_linear = dml_floor(
1599 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(
1601 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(
1606 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
1608 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(
H A Ddisplay_mode_vba_21.c752 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
839 dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1069 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1225 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1419 1 << (unsigned int) dml_floor(
2640 dml_floor(
2706 locals->LinesInDETYRoundedDownToSwath[k] = dml_floor(
3318 return dml_floor(16 * DecimalBPP, 1) / 16.0;
3336 return dml_floor(1
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20v2.c198 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height),
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height),
610 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries
1492 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l,
1494 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l,
1499 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1501 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c,
H A Ddisplay_rq_dlg_calc_20.c198 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height),
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height),
610 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries
1491 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l,
1493 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l,
1498 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1500 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c,
H A Ddisplay_mode_vba_20v2.c535 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / HTotal, 1);
694 *DestinationLinesForPrefetch = dml_floor(4.0 * (*DestinationLinesForPrefetch + 0.125), 1)
759 *DestinationLinesToRequestVMInVBlank = dml_floor(
763 *DestinationLinesToRequestRowInVBlank = dml_floor(
864 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
886 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1103 << (unsigned int) dml_floor(
1569 mode_lib->vba.LinesInDETYRoundedDownToSwath[k] = dml_floor(
1581 mode_lib->vba.LinesInDETCRoundedDownToSwath[k] = dml_floor(
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H A Ddisplay_mode_vba_20.c543 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / HTotal, 1);
634 *DestinationLinesForPrefetch = dml_floor(4.0 * (*DestinationLinesForPrefetch + 0.125), 1)
699 *DestinationLinesToRequestVMInVBlank = dml_floor(
703 *DestinationLinesToRequestRowInVBlank = dml_floor(
804 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
826 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1043 << (unsigned int) dml_floor(
1533 mode_lib->vba.LinesInDETYRoundedDownToSwath[k] = dml_floor(
1545 mode_lib->vba.LinesInDETCRoundedDownToSwath[k] = dml_floor(
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.c119 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), 1) - 3;
123 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), 1) - 3;
580 log2_dpte_row_height_linear = dml_floor(dml_log2(dpte_buf_in_pte_reqs * dpte_req_width / data_pitch), 1);
1515 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l, 1);
1516 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, 1);
1519 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, 1);
1520 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, 1);
H A Ddisplay_mode_vba_31.c1015 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
1108 dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1464 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1567 detile_buf_vp_horz_limit = dml_floor(detile_buf_vp_horz_limit - 1, 16);
1568 detile_buf_vp_vert_limit = dml_floor(detile_buf_vp_vert_limit - 1, 16);
1750 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1752 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1951 *dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1));
2554 dml_floor((v->VTotal[k] - v->VActive[k]) / 2.0, 1.0) :
3163 v->MIN_DST_Y_NEXT_START[k] = ((isInterlaceTiming ? dml_floor((
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c122 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height),
127 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height),
579 log2_dpte_row_height_linear = dml_floor(dml_log2(dpte_buf_in_pte_reqs * dpte_req_width / data_pitch), 1);
1684 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int)dml_floor(refcyc_per_line_delivery_pre_l,
1686 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int)dml_floor(refcyc_per_line_delivery_l,
1691 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int)dml_floor(refcyc_per_line_delivery_pre_c,
1693 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int)dml_floor(refcyc_per_line_delivery_c,
H A Ddisplay_mode_vba_30.c983 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
1029 dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1300 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1420 detile_buf_vp_horz_limit = dml_floor(detile_buf_vp_horz_limit - 1, 16);
1421 detile_buf_vp_vert_limit = dml_floor(detile_buf_vp_vert_limit - 1, 16);
1624 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1626 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1805 *dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1));
3517 return dml_floor(16.0 * MaxLinkBPP, 1.0) / 16.0;
5303 mode_lib->vba.LBLatencyHidingSourceLinesY = dml_min((double) MaxLineBufferLines, dml_floor(LineBufferSiz
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.c207 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), 1) - 3;
211 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), 1) - 3;
668 log2_dpte_row_height_linear = dml_floor(dml_log2(dpte_buf_in_pte_reqs * dpte_req_width / data_pitch), 1);
1603 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l, 1);
1604 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, 1);
1607 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, 1);
1608 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, 1);
H A Ddisplay_mode_vba_314.c1036 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
1129 dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1484 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1587 detile_buf_vp_horz_limit = dml_floor(detile_buf_vp_horz_limit - 1, 16);
1588 detile_buf_vp_vert_limit = dml_floor(detile_buf_vp_vert_limit - 1, 16);
1770 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1772 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1971 *dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1));
3186 v->MIN_DST_Y_NEXT_START[k] = dml_floor((v->VTotal[k] - v->VFrontPorch[k] + v->VTotal[k] - v->VActive[k] - v->VStartup[k]) / 2.0, 1.0);
3190 v->MIN_DST_Y_NEXT_START[k] += dml_floor(4.
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