Searched refs:dma_base (Results 1 - 25 of 66) sorted by relevance

123

/linux-master/arch/arm64/mm/
H A Ddma-mapping.c49 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, argument
62 iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
/linux-master/drivers/dma/
H A Dmv_xor_v2.c140 * @dma_base: memory mapped DMA register base
157 void __iomem *dma_base; member in struct:mv_xor_v2_device
231 writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ADD_OFF);
241 writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DEALLOC_OFF);
251 xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_CTRL_OFF);
265 reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
269 writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
272 reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
275 writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
284 reg = readl(xor_dev->dma_base
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/linux-master/arch/arm/mach-davinci/
H A Dsram.c24 dma_addr_t dma_base = davinci_soc_info.sram_dma; local
28 if (!sram_pool || (dma && !dma_base))
/linux-master/drivers/net/ethernet/8390/
H A Detherh.c67 void __iomem *dma_base; member in struct:etherh_priv
309 void __iomem *dma_base, *addr; local
327 dma_base = etherh_priv(dev)->dma_base;
348 writesw (dma_base, buf, count >> 1);
350 writesb (dma_base, buf, count);
374 void __iomem *dma_base, *addr; local
386 dma_base = etherh_priv(dev)->dma_base;
397 readsw (dma_base, bu
414 void __iomem *dma_base, *addr; local
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/linux-master/arch/arm/mm/
H A Ddma-mapping-nommu.c36 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, argument
/linux-master/arch/arc/mm/
H A Ddma.c93 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, argument
/linux-master/drivers/gpu/drm/nouveau/nvkm/falcon/
H A Dbase.c56 nvkm_falcon_dma_wr(struct nvkm_falcon *falcon, const u8 *img, u64 dma_addr, u32 dma_base, argument
70 dma_start = dma_base;
71 dma_addr += dma_base;
75 type, mem_base, len, dma_base, dma_addr - dma_base, dma_start);
84 src = dma_base;
97 printk(KERN_CONT " <- %08x+%08x", dma_base,
98 src + i - dma_base - (x * 4));
H A Dga102.c40 ga102_flcn_dma_xfer(struct nvkm_falcon *falcon, u32 mem_base, u32 dma_base, u32 cmd) argument
43 nvkm_falcon_wr32(falcon, 0x11c, dma_base);
/linux-master/drivers/ata/
H A Dpata_octeon_cf.c59 u64 dma_base; member in struct:octeon_cf_port
249 c = (cf_port->dma_base & 8) >> 3;
279 cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64);
550 cvmx_write_csr(cf_port->dma_base + DMA_INT, mio_boot_dma_int.u64);
553 cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, mio_boot_dma_int.u64);
581 cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64);
604 dma_cfg.u64 = cvmx_read_csr(cf_port->dma_base + DMA_CFG);
614 cvmx_write_csr(cf_port->dma_base + DMA_CFG, dma_cfg.u64);
618 cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, dma_int.u64);
622 cvmx_write_csr(cf_port->dma_base
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/linux-master/arch/arm/mach-omap1/
H A Ddma.c174 static void __iomem *dma_base; variable
177 void __iomem *addr = dma_base;
189 void __iomem *addr = dma_base;
308 dma_base = ioremap(res[0].start, resource_size(&res[0]));
309 if (!dma_base) {
388 iounmap(dma_base);
/linux-master/drivers/media/platform/samsung/s5p-mfc/
H A Ds5p_mfc_ctrl.c182 mfc_write(dev, dev->dma_base[BANK_L_CTX],
185 &dev->dma_base[BANK_L_CTX]);
187 mfc_write(dev, dev->dma_base[BANK_L_CTX],
189 mfc_write(dev, dev->dma_base[BANK_R_CTX],
192 &dev->dma_base[BANK_L_CTX],
193 &dev->dma_base[BANK_R_CTX]);
/linux-master/arch/alpha/kernel/
H A Dpci_impl.h140 dma_addr_t dma_base; member in struct:pci_iommu_arena
H A Dpci_iommu.c86 arena->dma_base = base;
115 base = arena->dma_base >> PAGE_SHIFT;
279 if (!arena || arena->dma_base + arena->size - 1 > max_dma)
298 ret = arena->dma_base + dma_ofs * PAGE_SIZE;
381 if (!arena || dma_addr < arena->dma_base)
384 dma_ofs = (dma_addr - arena->dma_base) >> PAGE_SHIFT;
388 dma_addr, arena->dma_base, arena->size);
590 out->dma_address = arena->dma_base + dma_ofs*PAGE_SIZE + paddr;
671 if (!arena || arena->dma_base + arena->size - 1 > max_dma)
736 if (!arena || arena->dma_base
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H A Dcore_titan.c329 port->wsba[0].csr = hose->sg_isa->dma_base | 3;
337 port->wsba[2].csr = hose->sg_pci->dma_base | 3;
502 baddr >= (unsigned long)hose->sg_pci->dma_base &&
503 last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){
508 baddr -= hose->sg_pci->dma_base;
509 last -= hose->sg_pci->dma_base;
617 aper->arena->dma_base + aper->pg_start * PAGE_SIZE;
707 unsigned long baddr = addr - aper->arena->dma_base;
H A Dpci.c101 if (pci && pci->dma_base + pci->size >= 0xfff00000UL)
102 pci->size = 0xfff00000UL - pci->dma_base;
335 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
H A Dcore_marvel.c297 hose->sg_isa->dma_base | wbase_m_ena | wbase_m_sg;
314 hose->sg_pci->dma_base | wbase_m_ena | wbase_m_sg;
736 baddr >= (unsigned long)hose->sg_pci->dma_base &&
737 last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size) {
742 baddr -= hose->sg_pci->dma_base;
743 last -= hose->sg_pci->dma_base;
891 aper->arena->dma_base + aper->pg_start * PAGE_SIZE;
1003 unsigned long baddr = addr - aper->arena->dma_base;
/linux-master/drivers/gpu/drm/nouveau/include/nvfw/
H A Dpmu.h15 u32 dma_base; member in struct:nv_pmu_args::__anon581
/linux-master/drivers/gpu/drm/msm/dsi/
H A Ddsi.h52 bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
68 u32 dma_base, u32 len);
/linux-master/arch/mips/mm/
H A Ddma-noncoherent.c140 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, argument
/linux-master/drivers/mmc/host/
H A Dcavium-thunderx.c86 host->dma_base = host->base;
181 dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
183 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
H A Dcavium-octeon.c218 host->dma_base = base;
309 dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
311 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
H A Dcavium.c387 fifo_cfg = readq(host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
396 writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
538 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
544 writeq(addr, host->dma_base + MIO_EMM_DMA_ADR(host));
566 writeq(0, host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
573 writeq(addr, host->dma_base + MIO_EMM_DMA_FIFO_ADR(host));
596 writeq(fifo_cmd, host->dma_base + MIO_EMM_DMA_FIFO_CMD(host));
613 writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));
/linux-master/drivers/net/ethernet/cortina/
H A Dgemini.c109 void __iomem *dma_base; member in struct:gemini_ethernet_port
524 readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
525 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
528 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
530 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
558 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
581 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
682 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
692 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
1251 ptr_reg = port->dma_base
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/linux-master/arch/riscv/mm/
H A Ddma-noncoherent.c131 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, argument
/linux-master/arch/powerpc/platforms/pseries/
H A Diommu.c367 __be64 dma_base; /* address hi,lo */ member in struct:dynamic_dma_window_prop
427 dma_offset = next + be64_to_cpu(maprange->dma_base);
452 be64_to_cpu(maprange->dma_base);
497 dma_offset = next + be64_to_cpu(maprange->dma_base);
754 prop->dma_base = p->dma_base;
763 prop->dma_base = cpu_to_be64(offset);
802 be64_to_cpu(prop.dma_base),
811 ppci->table_group->tce32_start = be64_to_cpu(prop.dma_base);
965 *dma_addr = be64_to_cpu(dma64->dma_base);
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