Searched refs:ddr (Results 1 - 25 of 37) sorted by relevance

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/linux-master/include/memory/
H A Drenesas-rpc-if.h26 bool ddr; member in struct:rpcif_op::__anon201
32 bool ddr; member in struct:rpcif_op::__anon202
44 bool ddr; member in struct:rpcif_op::__anon204
52 bool ddr; member in struct:rpcif_op::__anon205
/linux-master/arch/mips/rb532/
H A Dprom.c21 #include <asm/mach-rc32434/ddr.h>
29 .name = "ddr-reg",
103 struct ddr_ram __iomem *ddr; local
107 ddr = ioremap(ddr_reg[0].start,
110 if (!ddr) {
115 ddrbase = (phys_addr_t)&ddr->ddrbase;
116 memsize = (phys_addr_t)&ddr->ddrmask;
/linux-master/arch/arm/mach-at91/
H A Dpm.h15 #include <soc/at91/sama7-ddr.h>
/linux-master/sound/soc/intel/atom/sst/
H A Dsst_pci.c52 ctx->ddr = pcim_iomap(pci, 0,
54 if (!ctx->ddr) {
58 dev_dbg(ctx->dev, "sst: DDR Ptr %p\n", ctx->ddr);
60 ctx->ddr = NULL;
H A Dsst.c485 fw_save->ddr = kvzalloc(ctx->ddr_end - ctx->ddr_base, GFP_KERNEL);
486 if (!fw_save->ddr) {
488 goto ddr;
494 memcpy32_fromio(fw_save->ddr, ctx->ddr, ctx->ddr_end - ctx->ddr_base);
499 ddr:
530 memcpy32_toio(ctx->ddr, fw_save->ddr, ctx->ddr_end - ctx->ddr_base);
535 kvfree(fw_save->ddr);
H A Dsst_acpi.c218 ctx->ddr = devm_ioremap(ctx->dev, ctx->ddr_base,
220 if (!ctx->ddr) {
H A Dsst.h317 void *ddr; /* allocated via kvmalloc() */ member in struct:sst_fw_save
359 void __iomem *ddr; member in struct:intel_sst_drv
H A Dsst_loader.c200 ram_iomem = sst_drv_ctx->ddr;
/linux-master/drivers/media/pci/cx18/
H A Dcx18-cards.c74 .ddr = {
121 .ddr = {
168 .ddr = {
221 .ddr = {
274 .ddr = {
334 .ddr = {
390 .ddr = {
439 .ddr = {
487 .ddr = {
540 .ddr
[all...]
H A Dcx18-firmware.c324 cx18_write_reg(cx, cx->card->ddr.chip_config, CX18_DDR_CHIP_CONFIG);
328 cx18_write_reg(cx, cx->card->ddr.refresh, CX18_DDR_REFRESH);
329 cx18_write_reg(cx, cx->card->ddr.timing1, CX18_DDR_TIMING1);
330 cx18_write_reg(cx, cx->card->ddr.timing2, CX18_DDR_TIMING2);
335 cx18_write_reg(cx, cx->card->ddr.tune_lane, CX18_DDR_TUNE_LANE);
336 cx18_write_reg(cx, cx->card->ddr.initial_emrs, CX18_DDR_INITIAL_EMRS);
H A Dcx18-cards.h130 struct cx18_ddr ddr; member in struct:cx18_card
/linux-master/drivers/clk/meson/
H A DMakefile24 obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o
H A Dmeson8-ddr.c8 #include <dt-bindings/clock/meson8-ddr-clkc.h>
136 { .compatible = "amlogic,meson8-ddr-clkc" },
137 { .compatible = "amlogic,meson8b-ddr-clkc" },
144 .name = "meson8-ddr-clkc",
/linux-master/drivers/staging/media/atomisp/pci/runtime/isp_param/interface/
H A Dia_css_isp_param.h91 /* Copy host parameter images to ddr */
94 struct ia_css_isp_param_css_segments *ddr,
/linux-master/drivers/mtd/hyperbus/
H A Drpc-if.c29 .ddr = true,
33 .ddr = true,
38 .ddr = true,
42 .ddr = true,
/linux-master/drivers/memory/
H A Drenesas-rpc-if.c191 u32 ddr; /* DRDRENR or SMDRENR */ member in struct:rpcif_priv
426 rpc->ddr = 0;
433 if (op->cmd.ddr)
434 rpc->ddr = RPCIF_SMDRENR_HYPE(0x5);
450 if (op->addr.ddr)
451 rpc->ddr |= RPCIF_SMDRENR_ADDRE;
468 if (op->option.ddr)
469 rpc->ddr |= RPCIF_SMDRENR_OPDRE;
488 if (op->data.ddr)
489 rpc->ddr |
[all...]
/linux-master/drivers/clk/rockchip/
H A DMakefile15 clk-rockchip-y += clk-ddr.o
/linux-master/drivers/staging/media/atomisp/pci/runtime/isp_param/src/
H A Disp_param.c185 struct ia_css_isp_param_css_segments *ddr,
193 ia_css_ptr ddr_mem_ptr = ddr->params[pclass][mem].address;
196 if (size != ddr->params[pclass][mem].size)
184 ia_css_isp_param_copy_isp_mem_if_to_ddr( struct ia_css_isp_param_css_segments *ddr, const struct ia_css_isp_param_host_segments *host, enum ia_css_param_class pclass) argument
/linux-master/drivers/mmc/host/
H A Dmeson-gx-mmc.c161 bool ddr; member in struct:meson_host
354 bool ddr)
361 if (host->ddr == ddr && host->req_rate == rate)
378 if (ddr) {
386 host->ddr = ddr;
399 if (ddr) {
565 bool ddr; local
570 ddr
353 meson_mmc_clk_set(struct meson_host *host, unsigned long rate, bool ddr) argument
[all...]
H A Dmmci_stm32_sdmmc.c299 unsigned int clk = 0, ddr = 0; local
303 ddr = MCI_STM32_CLK_DDR;
308 * in ddr mode bypass is not possible
311 if (desired >= host->mclk && !ddr) {
342 clk |= ddr;
/linux-master/drivers/pinctrl/nuvoton/
H A Dpinctrl-npcm7xx.c585 NPCM7XX_GRP(ddr), \
728 NPCM7XX_SFUNC(ddr); variable
846 NPCM7XX_MKFUNC(ddr),
1038 NPCM7XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1039 NPCM7XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1040 NPCM7XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1041 NPCM7XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1139 NPCM7XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1140 NPCM7XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1141 NPCM7XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL
[all...]
H A Dpinctrl-npcm8xx.c768 NPCM8XX_GRP(ddr), \
1016 NPCM8XX_SFUNC(ddr); variable
1240 NPCM8XX_MKFUNC(ddr),
1441 NPCM8XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, 0),
1442 NPCM8XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, 0),
1443 NPCM8XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
1444 NPCM8XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
1535 NPCM8XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), /* DSCNT */
1536 NPCM8XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, SLEW), /* DSCNT */
1537 NPCM8XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL
[all...]
/linux-master/drivers/gpio/
H A Dgpio-adnp.c190 u8 ddr, plr, ier, isr; local
194 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr);
219 if (ddr & BIT(j))
/linux-master/drivers/mfd/
H A Dsm501.c951 unsigned long ddr; local
958 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW);
959 smc501_writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW);
978 unsigned long ddr; local
992 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW);
993 smc501_writel(ddr | bit, regs + SM501_GPIO_DDR_LOW);
/linux-master/drivers/clk/davinci/
H A Dpsc-da850.c111 LPSC(6, 0, ddr, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),

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