History log of /linux-master/arch/arm/mach-at91/pm.h
Revision Date Author Comments
# 475be50f 15-Apr-2021 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: add support for 2.5V LDO regulator control

Add support to disable/enable 2.5V LDO regulator when entering/exiting
any ULP mode.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210415105010.569620-15-claudiu.beznea@microchip.com


# f0bbf179 15-Apr-2021 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: add self-refresh support for sama7g5

Add self-refresh support for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210415105010.569620-13-claudiu.beznea@microchip.com


# e70bfc2f 05-Aug-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: add support for ULP0 fast wakeup

ULP0 fast improves suspend/resume time with few milliseconds the drawback
being the power consumption. The mean values measured for suspend/resume
time are as follows (measured on SAMA5D2 Xplained board), ULP0 compared
with fast ULP0:
- ulp0 fast: suspend time: 169 ms, resume time: 216 ms
- ulp0 : suspend time: 197 ms, resume time: 258 ms

Current consumption while suspended (measured on SAMA5D2 Xplained board):
- ulp0 fast: 730uA
- ulp0 : 270uA

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1596616610-15460-2-git-send-email-claudiu.beznea@microchip.com


# 0be298a9 20-Jan-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: add pmc_version member to at91_pm_data

This will be used to differentiate b/w different PLLs settings to be
applied in the final/first steps of the suspend/resume process by doing
PLL specific configurations.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com


# 6ec1587b 20-Jan-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: use proper master clock register offset

SAM9X60's PMC has different master clock register offset than the other
SoCs' PMC. Due to this, specify master clock register offset based
on PMC compatible and pass it to pm_suspend.S since it is also needed
in there. When PM part for SAM9X60 was published the SAM9X60's PMC
(commit f6deae46039c ("clk: at91: add sam9x60 pmc driver")) wasn't
integrated.

Fixes: 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-2-git-send-email-claudiu.beznea@microchip.com


# 2874c5fd 27-May-2019 Thomas Gleixner <tglx@linutronix.de>

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


# 5b56c182 17-Jul-2018 Wenyou Yang <wenyou.yang@atmel.com>

ARM: at91: pm: Add ULP1 mode support

In the ULP1 mode, in order to achieve the lowest power consumption
with the system in retention mode and be able to resume on the wake
up events, all the clocks are shut off, inclusive the embedded 12MHz
RC oscillator, and the number of wake up sources is limited as well.
When the wake up event is asserted, the embedded 12MHz RC oscillator
restarts automatically.

The ULP1 (Ultra Low-power mode 1) is introduced by SAMA5D2.

The previous size of pm_suspend.o was 2148 bytes. With the addition of
ULP1 mode the new size of pm_suspend.o raised at 2456 bytes.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: aligned with 4.18-rc1]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>


# 514e2a29 17-Jul-2018 Claudiu Beznea <claudiu.beznea@microchip.com>

ARM: at91: pm: Use ULP0 naming instead of slow clock

Switch to use ULP0 naming instead of slow clock naming for power modes, to
be as closed as possible to datasheet. This commit does the necessary
renaming and macro addition to be as close as possible to the namings
from [1].

[1] https://lore.kernel.org/lkml/1470650705-31418-3-git-send-email-wenyou.yang@atmel.com

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>


# 7693e18e 26-Apr-2017 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: allow selecting standby and suspend modes

While we can only select between "standby" and "mem" states for power
management, the atmel platforms can actually support more modes.

For both standby and mem, allow selecting which mode will be used using the
atmel.pm_modes kernel parameter.
By default, keep the current modes.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>


# 24a0f5c5 26-Sep-2016 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: Add sama5d2 backup mode

The sama5d2 has a mode were it is possible to cut power to the SoC while
keeping the RAM in self refresh.
Resuming from that mode needs support in the firmware/bootloader.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>


# 65cc1a59 31-Jan-2017 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: Use struct at91_pm_data in pm_suspend.S

The number of register we can safely pass to at91_pm_suspend_in_sram is
limited. Instead, pass the address to the at91_pm_data structure.

The offsets are automatically generated to avoid hardcoding them.

Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>


# 4d767bc3 31-Jan-2017 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: Move at91_ramc_read/write to pm.c

Those macros are only used in pm.c, move them there so we can remove the
test on __ASSEMBLY__.

Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>


# 6cc7fbdf 26-Sep-2016 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: remove useless extern definition

at91_ramc_base is local to pm.c, remove its definition in pm.h

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>


# 09099f19 16-Mar-2015 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h

mach/at91_ramc.h and mach/at91rm9200_mc.h aren't necessary anymore, remove them.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 2e57dc08 16-Mar-2015 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91/pm: move AT91_MEMCTRL_* to pm.h

the AT91_MEMCTRL_* defines are only used by the pm code, move them to pm.h

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# a18d0699 16-Mar-2015 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91/pm: move the standby functions to pm.c

The standby functions are now only used in pm.c, move them there.

Also, they are not inlined as a pointer to those functions is passed to the
cpuidle driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 23be4be5 08-Mar-2015 Wenyou Yang <wenyou.yang@atmel.com>

ARM: at91/pm: standby mode uses same sram function as suspend to memory mode

To simply the PM code, the suspend to standby mode uses same sram function
as the suspend to memory mode, running in the internal SRAM, instead of the
respective code for each mode.

For the suspend to standby mode, the master clock doesn't switch to the slow
clock, and PLLA and the main oscillator doesn't turn off as well.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 047794e1 03-Mar-2015 Wenyou Yang <wenyou.yang@atmel.com>

ARM: at91: pm: change at91_pm_set_standby() to static

Since at91_pm_set_standby() will not be used out of the pm.c file,
change its attribute from extern to static, remove its declaration as well.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 84e87166 03-Mar-2015 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: pm: fix at91rm9200 standby

at91rm9200 standby and suspend to ram has been broken since
00482a4078f4. It is wrongly using AT91_BASE_SYS which is a physical address
and actually doesn't correspond to any register on at91rm9200.

Use the correct at91_ramc_base[0] instead.

Fixes: 00482a4078f4 (ARM: at91: implement the standby function for pm/cpuidle)

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# f0a0a58e 07-Nov-2014 Alexandre Belloni <alexandre.belloni@bootlin.com>

ARM: at91: move sdramc/ddrsdr header to include/soc/at91

Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the
dependency on mach/ headers from the at91-reset driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 7093bf2b 23-Nov-2013 Brent Taylor <motobud@gmail.com>

ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM

If CONFIG_PM is not defined, then arch/arm/mach-at91/pm.c is not
compiled in. This patch creates an inline function that does nothing
if CONFIG_PM is not defined.

Signed-off-by: Brent Taylor <motobud@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 2d2c476f 16-Oct-2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: AT91: pm: Factorize standby function

Detect presence of second bank. So we do not need to have on function per SoC

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>


# 5ad945ea 22-Sep-2013 Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: at91: cpuidle: Convert to platform driver

Using the platform driver model is a good way to separate the cpuidle specific
code from the low level pm code. It allows to remove the dependency between
these two components.

The platform_device is located in the pm code and a 'set' function has been
added to set the standby function from the AT91_SOC_START initialization
function. Each SoC with a cpuidle driver will set the standby function in the
platform_data field at init time. Then pm code will register the cpuidle
platform device.

The cpuidle driver will register the platform_driver and use the device's
platform_data as a standby callback in the idle path.

The at91_pm_enter function contains a { if then else } based on cpu_is_xx
similar to what was in cpuidle. This is considered dangerous when adding a new
SoC. Like the cpuidle driver, a standby ops is defined and assigned when the
SoC init function specifies what is its standby function and reused in the
at91_pm_enter's 'case' block.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# f5fa4098 25-Jan-2013 Arnd Bergmann <arnd@arndb.de>

ARM: at91: suspend both memory controllers on at91sam9263

For the past three years, we have had a #warning in
mach-at91 about the sdram_selfrefresh_enable or
at91sam9_standby functions possibly not working on
at91sam9263. In the meantime a function was added
to do the right thing on at91sam9g45, which looks like
it should also work on '9263.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[nicolas.ferre@atmel.com: remove paragraph in commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>


# 1e3ce2b8 05-Apr-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support

We can now compile all SoC core support together and DT boards.
We still can not compile together the non DT board.
So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig
compatibility. This will enable the plaform_device ressources.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# efd09165 12-Feb-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: at91: pm select memory controler at runtime

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: add cpuidle modification]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# f363c407 12-Feb-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: at91: make sdram/ddr register base soc independent

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 1a269ade 15-Nov-2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h

This cleanup is done to allow to have multiple SoC in the same image.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 00482a40 24-Jan-2012 Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: at91: implement the standby function for pm/cpuidle

This patch groups the self-refresh on/cpu_do_idle/self-refresh off into
a single 'standby' function.

The standby routine for rm9200 has been turned into an asm routine to have
a better control of the self refresh and to prevent a memory access when
running this code.

Draining the write buffer is done automatically when switching for the self
refresh on sam9, so the instruction is added to the rm9200 only.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# b59160f6 24-Jan-2012 Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: at91: remove wait_for_interrupt definition

All the "wait_for_interrupt" definition are aliases to cpu_do_idle.
Only the rm9200 has an asm routine to switch to wfi. But the cpu_do_idle
for this platform has exactly the same asm routine.

arch/arm/mm/proc-arm920.S
..
ENTRY(cpu_arm920_do_idle)
mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
..

Then it is safe to invoke cpu_do_idle for this platform. As all the
wait_for_interrupts are definition for cpu_do_idle, let's remove it
and replace its invokation by cpu_do_idle.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# fa50ae9c 24-Jan-2012 Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: at91: declare header name

Add the header and define the macro to prevent multiple inclusion
like the others headers.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# c54b7bbb 24-Jan-2012 Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: at91: coding style fixes

This patch is mindless and does only fix the line length.
The purpose is to facilitate the review of the next patches.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 9918ceaf 26-Jan-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: at91: code removal of CAP9 SoC

Following removal announce and addition to feature-removal-schedule.txt,
here is the actual source code deletion for Atmel CAP9 family.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 17d2cc25 17-Nov-2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.h

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# a2a571b7 22-Oct-2010 Nicolas Ferre <nicolas.ferre@microchip.com>

AT91: pm: make sure that r0 is 0 when dealing with cache operations

When using CP15 cache operations (c7), we make sure that Rd (r0)
is actually 0 as ARM 926 TRM is saying.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 8aeeda82 22-Oct-2010 Nicolas Ferre <nicolas.ferre@microchip.com>

AT91: pm: use plain cpu_do_idle() for "wait for interrupt"

For power management at91_pm_enter() routine, use the cpu_do_idle() for a
rock solid "wait for interrupt" implementation.
For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as
we can access RAM even while in self-refresh mode.
We keep plain access to CP15 for at91rm9200 as this feature is not
available: instructions have to be in a single cache line.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>


# 7dca3343 21-Jun-2010 Nicolas Ferre <nicolas.ferre@microchip.com>

ARM: 6185/1: AT91: PM: dual ram controller support

This rework allows to address tow memory controllers. AT91SAM9263 and
AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management
should take care of this.
This patch modify the way RAM IP header files are implemented to allow
access to registers of both controllers ; it also adds some macros.

We also modify the power management files to use those modified header files.
Slow clock (assembly) and regular power management functions are synchronized
for setting of RAM self-refresh procedure:
(lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH

Note that AT91RM9200 is not impacted by this modification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>


# 1ea60cf7 01-Nov-2009 Albin Tonnerre <albin.tonnerre@free-electrons.com>

ARM: 5778/1: AT91: Add cpuidle support

This patch adds the support for cpuidle on AT91 SoCs, taken from the
cpuidle support in mach-kirkwood.
cpuidle needs sdram_selfrefresh_enable and _disable, so move their
definition to a separate header file instead of duplicating the code
already used in pm.c.

Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>