Searched refs:ctrlq (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/gpu/drm/virtio/
H A Dvirtgpu_vq.c61 schedule_work(&vgdev->ctrlq.dequeue_work);
200 ctrlq.dequeue_work);
207 spin_lock(&vgdev->ctrlq.qlock);
209 virtqueue_disable_cb(vgdev->ctrlq.vq);
210 reclaim_vbufs(vgdev->ctrlq.vq, &reclaim_list);
212 } while (!virtqueue_enable_cb(vgdev->ctrlq.vq));
213 spin_unlock(&vgdev->ctrlq.qlock);
218 trace_virtio_gpu_cmd_response(vgdev->ctrlq.vq, resp, entry->seqno);
237 wake_up(&vgdev->ctrlq.ack_queue);
322 struct virtqueue *vq = vgdev->ctrlq
[all...]
H A Dvirtgpu_kms.c147 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
215 vgdev->ctrlq.vq = vqs[0];
286 flush_work(&vgdev->ctrlq.dequeue_work);
H A Dvirtgpu_drv.h228 struct virtio_gpu_queue ctrlq; member in struct:virtio_gpu_device
/linux-master/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_uld.c194 FW_PARAMS_PARAM_YZ_V(s->ctrlq[i].q.cntxt_id));
225 FW_PARAMS_PARAM_YZ_V(s->ctrlq[i].q.cntxt_id));
H A Dsge.c2835 ret = ctrl_xmit(&adap->sge.ctrlq[0], skb);
3127 return ctrl_xmit(&adap->sge.ctrlq[idx], skb);
4951 for (i = 0; i < ARRAY_SIZE(adap->sge.ctrlq); i++) {
4952 struct sge_ctrl_txq *cq = &adap->sge.ctrlq[i];
5047 for (i = 0; i < ARRAY_SIZE(s->ctrlq); i++) {
5048 struct sge_ctrl_txq *cq = &s->ctrlq[i];
H A Dcxgb4_main.c1108 err = t4_sge_alloc_ctrl_txq(adap, &s->ctrlq[i], adap->port[i],
2468 disable_txq_db(&adap->sge.ctrlq[i].q);
2490 enable_txq_db(adap, &adap->sge.ctrlq[i].q);
2571 sync_txq_pidx(adap, &adap->sge.ctrlq[i].q);
5804 for (i = 0; i < ARRAY_SIZE(s->ctrlq); i++)
5805 s->ctrlq[i].q.size = 512;
H A Dcxgb4.h967 struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES]; member in struct:sge
H A Dcxgb4_debugfs.c3103 const struct sge_ctrl_txq *tx = &s->ctrlq[r * 4];
H A Dcudbg_lib.c3436 QDESC_GET_TXQ(&s->ctrlq[i].q, CUDBG_QTYPE_CTRLQ, out);

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