/linux-master/arch/sh/kernel/cpu/ |
H A D | adc.c | 16 unsigned char csr; local 22 csr = __raw_readb(ADCSR); 23 csr = channel | ADCSR_ADST | ADCSR_CKS; 24 __raw_writeb(csr, ADCSR); 27 csr = __raw_readb(ADCSR); 28 } while ((csr & ADCSR_ADF) == 0); 30 csr &= ~(ADCSR_ADF | ADCSR_ADST); 31 __raw_writeb(csr, ADCSR);
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/linux-master/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_gen4_ras.c | 10 static void enable_errsou_reporting(void __iomem *csr) argument 13 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK0, 0); 16 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK1, 0); 22 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK2, 30 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK3, 35 static void disable_errsou_reporting(void __iomem *csr) argument 40 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK0, ADF_GEN4_ERRSOU0_BIT); 43 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK1, ADF_GEN4_ERRSOU1_BITMASK); 46 val = ADF_CSR_RD(csr, ADF_GEN4_ERRMSK2); 48 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK 54 enable_ae_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 66 disable_ae_error_reporting(void __iomem *csr) argument 75 enable_cpp_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 88 disable_cpp_error_reporting(void __iomem *csr) argument 97 enable_ti_ri_error_reporting(void __iomem *csr) argument 131 disable_ti_ri_error_reporting(void __iomem *csr) argument 167 enable_rf_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 183 disable_rf_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 209 enable_ssm_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 246 disable_ssm_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 299 enable_aram_error_reporting(void __iomem *csr) argument 314 disable_aram_error_reporting(void __iomem *csr) argument 325 void __iomem *csr = adf_get_pmisc_base(accel_dev); local 339 void __iomem *csr = adf_get_pmisc_base(accel_dev); local 350 adf_gen4_process_errsou0(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 367 adf_handle_cpp_aeunc(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 389 adf_handle_cppcmdparerr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 412 adf_handle_ri_mem_par_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 445 adf_handle_ti_ci_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 466 adf_handle_ti_pullfub_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 490 adf_handle_ti_pushfub_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 514 adf_handle_ti_cd_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 537 adf_handle_ti_trnsb_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 560 adf_handle_iosfp_cmd_parerr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 582 adf_gen4_process_errsou1(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou, bool *reset_required) argument 597 adf_handle_uerrssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 619 adf_handle_cerrssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 641 adf_handle_pperr_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 663 adf_poll_slicehang_csr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 slice_hang_offset, char *slice_name) argument 678 adf_handle_slice_hang_error(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 703 adf_handle_spp_pullcmd_err(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 780 adf_handle_spp_pulldata_err(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 846 adf_handle_spp_pushcmd_err(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 924 adf_handle_spp_pushdata_err(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 991 adf_handle_spppar_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 1007 adf_handle_ssmcpppar_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 1046 adf_handle_rf_parr_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 1105 adf_handle_ser_err_ssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) argument 1158 adf_handle_iaintstatssm(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 1182 adf_handle_exprpssmcmpr(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 1201 adf_handle_exprpssmxlt(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 1230 adf_handle_exprpssmdcpr(struct adf_accel_dev *accel_dev, void __iomem *csr) argument 1263 adf_handle_ssm(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1279 adf_handle_cpp_cfc_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1317 adf_gen4_process_errsou2(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou, bool *reset_required) argument 1325 adf_handle_timiscsts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1343 adf_handle_ricppintsts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1364 adf_handle_ticppintsts(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1385 adf_handle_aramcerr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1408 adf_handle_aramuerr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1445 adf_handle_reg_cppmemtgterr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1481 adf_handle_atufaultstatus(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou) argument 1509 adf_gen4_process_errsou3(struct adf_accel_dev *accel_dev, void __iomem *csr, void __iomem *aram_csr, u32 errsou, bool *reset_required) argument 1526 void __iomem *csr = adf_get_pmisc_base(accel_dev); local [all...] |
H A D | icp_qat_hw_20_comp.h | 23 ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER(struct icp_qat_hw_comp_20_config_csr_lower csr) argument 27 QAT_FIELD_SET(val32, csr.algo, 30 QAT_FIELD_SET(val32, csr.sd, 33 QAT_FIELD_SET(val32, csr.edmm, 36 QAT_FIELD_SET(val32, csr.hbs, 39 QAT_FIELD_SET(val32, csr.lllbd, 42 QAT_FIELD_SET(val32, csr.mmctrl, 45 QAT_FIELD_SET(val32, csr.hash_col, 48 QAT_FIELD_SET(val32, csr.hash_update, 51 QAT_FIELD_SET(val32, csr 74 ICP_QAT_FW_COMP_20_BUILD_CONFIG_UPPER(struct icp_qat_hw_comp_20_config_csr_upper csr) argument 121 ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER(struct icp_qat_hw_decomp_20_config_csr_lower csr) argument 150 ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_UPPER(struct icp_qat_hw_decomp_20_config_csr_upper csr) argument [all...] |
H A D | icp_qat_hal.h | 125 #define SET_CAP_CSR(handle, csr, val) \ 126 ADF_CSR_WR((handle)->hal_cap_g_ctl_csr_addr_v, csr, val) 127 #define GET_CAP_CSR(handle, csr) \ 128 ADF_CSR_RD((handle)->hal_cap_g_ctl_csr_addr_v, csr) 131 #define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & (csr))) 132 #define SET_AE_CSR(handle, ae, csr, val) \ 133 ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val) 134 #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), [all...] |
H A D | adf_hw_arbiter.c | 21 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; local 36 WRITE_CSR_ARB_SARCONFIG(csr, arb_off, arb, arb_cfg); 42 WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, thd_2_arb_cfg[i]); 79 void __iomem *csr; local 89 csr = accel_dev->transport->banks[0].csr_addr; 95 WRITE_CSR_ARB_SARCONFIG(csr, arb_off, i, 0); 99 WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, 0); 103 csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); 109 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; local 127 WRITE_CSR_ARB_WT2SAM(csr, inf [all...] |
/linux-master/arch/sparc/kernel/ |
H A D | ebus.c | 74 u32 csr = 0; local 77 csr = readl(p->regs + EBDMA_CSR); 78 writel(csr, p->regs + EBDMA_CSR); 81 if (csr & EBDMA_CSR_ERR_PEND) { 85 } else if (csr & EBDMA_CSR_INT_PEND) { 87 (csr & EBDMA_CSR_TC) ? 99 u32 csr; local 113 csr = EBDMA_CSR_BURST_SZ_16 | EBDMA_CSR_EN_CNT; 116 csr |= EBDMA_CSR_TCI_DIS; 118 writel(csr, 127 u32 csr; local 159 u32 csr; local 179 u32 csr; local 208 u32 csr; local 244 u32 orig_csr, csr; local [all...] |
/linux-master/arch/alpha/kernel/ |
H A D | core_tsunami.c | 182 volatile unsigned long *csr; 187 csr = &pchip->tlbia.csr; 189 csr = &pchip->tlbiv.csr; 195 *csr = value; 197 *csr; 229 TSUNAMI_cchip->misc.csr |= (1L << 28); /* clear NXM... */ 233 if (TSUNAMI_cchip->misc.csr & (1L << 28)) { 234 int source = (TSUNAMI_cchip->misc.csr >> 2 181 volatile unsigned long *csr; local [all...] |
H A D | core_wildfire.c | 121 pci->pci_window[0].wbase.csr = hose->sg_isa->dma_base | 3; 122 pci->pci_window[0].wmask.csr = (hose->sg_isa->size - 1) & 0xfff00000; 123 pci->pci_window[0].tbase.csr = virt_to_phys(hose->sg_isa->ptes); 125 pci->pci_window[1].wbase.csr = 0x40000000 | 1; 126 pci->pci_window[1].wmask.csr = (0x40000000 -1) & 0xfff00000; 127 pci->pci_window[1].tbase.csr = 0; 129 pci->pci_window[2].wbase.csr = 0x80000000 | 1; 130 pci->pci_window[2].wmask.csr = (0x40000000 -1) & 0xfff00000; 131 pci->pci_window[2].tbase.csr = 0x40000000; 133 pci->pci_window[3].wbase.csr [all...] |
H A D | core_titan.c | 210 volatile unsigned long *csr; 223 csr = &port->port_specific.g.gtlbia.csr; 225 csr = &port->port_specific.g.gtlbiv.csr; 232 *csr = value; 234 *csr; 243 pctl.pctl_q_whole = port->pctl.csr; 296 saved_config[index].wsba[0] = port->wsba[0].csr; 297 saved_config[index].wsm[0] = port->wsm[0].csr; 207 volatile unsigned long *csr; local [all...] |
H A D | sys_marvel.c | 97 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ 99 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; 175 volatile unsigned long *csr, 180 val = *csr; 184 *csr = val; 186 *csr; 197 val = io7->csrs->PO7_LSI_CTL[which].csr; 201 io7->csrs->PO7_LSI_CTL[which].csr = val; 203 io7->csrs->PO7_LSI_CTL[which].csr; 214 val = io7->csrs->PO7_MSI_CTL[which].csr; 173 io7_redirect_irq(struct io7 *io7, volatile unsigned long *csr, unsigned int where) argument [all...] |
/linux-master/arch/loongarch/kvm/ |
H A D | timer.c | 46 kvm_write_sw_gcsr(vcpu->arch.csr, LOONGARCH_CSR_TVAL, 0); 57 struct loongarch_csrs *csr = vcpu->arch.csr; local 60 * Set guest stable timer cfg csr 64 cfg = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG); 67 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ESTAT); 68 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_TCFG); 71 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_TVAL); 90 ticks = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TVAL); 91 estat = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_ESTA 142 struct loongarch_csrs *csr = vcpu->arch.csr; local 177 struct loongarch_csrs *csr = vcpu->arch.csr; local [all...] |
H A D | vcpu.c | 256 struct loongarch_csrs *csr = vcpu->arch.csr; local 263 gintc = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_GINTC) & 0xff; 264 *val = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_ESTAT) | (gintc << 2); 272 *val = kvm_read_sw_gcsr(csr, id); 280 struct loongarch_csrs *csr = vcpu->arch.csr; local 288 kvm_set_sw_gcsr(csr, LOONGARCH_CSR_GINTC, gintc); 291 kvm_set_sw_gcsr(csr, LOONGARCH_CSR_ESTAT, gintc); 296 kvm_write_sw_gcsr(csr, i 893 struct loongarch_csrs *csr; local 962 struct loongarch_csrs *csr = vcpu->arch.csr; local 1065 struct loongarch_csrs *csr = vcpu->arch.csr; local [all...] |
/linux-master/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00mmio.h | 24 return readl(rt2x00dev->csr.base + offset); 31 memcpy_fromio(value, rt2x00dev->csr.base + offset, length); 38 writel(value, rt2x00dev->csr.base + offset); 46 __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
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/linux-master/arch/m68k/sun3x/ |
H A D | time.h | 9 volatile unsigned char csr; member in struct:mostek_dt
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/linux-master/arch/mips/cavium-octeon/executive/ |
H A D | cvmx-interrupt-rsl.c | 53 union cvmx_asxx_int_en csr; local 65 csr.u64 = cvmx_read_csr(CVMX_ASXX_INT_EN(block)); 66 csr.s.txpsh = mask; 67 csr.s.txpop = mask; 68 csr.s.ovrflw = mask; 69 cvmx_write_csr(CVMX_ASXX_INT_EN(block), csr.u64);
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/linux-master/arch/mips/dec/ |
H A D | kn02-irq.c | 30 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + local 34 *csr = cached_kn02_csr; 39 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + local 43 *csr = cached_kn02_csr; 62 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + local 68 *csr = cached_kn02_csr;
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/linux-master/drivers/crypto/starfive/ |
H A D | jh7110-rsa.c | 80 rctx->csr.pka.v = 0; 82 writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET); 88 rctx->csr.pka.v = 0; 89 rctx->csr.pka.cln_done = 1; 90 rctx->csr.pka.opsize = opsize; 91 rctx->csr.pka.exposize = opsize; 92 rctx->csr.pka.cmd = CRYPTO_CMD_PRE; 93 rctx->csr.pka.start = 1; 94 rctx->csr.pka.not_r2 = 1; 95 rctx->csr [all...] |
/linux-master/drivers/power/reset/ |
H A D | xgene-reboot.c | 25 void __iomem *csr; member in struct:xgene_reboot_context 34 writel(ctx->mask, ctx->csr); 53 ctx->csr = devm_platform_ioremap_resource(pdev, 0); 54 if (IS_ERR(ctx->csr)) { 56 return PTR_ERR(ctx->csr);
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/linux-master/drivers/watchdog/ |
H A D | shwdt.c | 85 u8 csr; local 95 csr = sh_wdt_read_csr(); 96 csr |= WTCSR_WT | clock_division_ratio; 97 sh_wdt_write_csr(csr); 109 csr = sh_wdt_read_csr(); 110 csr |= WTCSR_TME; 111 csr &= ~WTCSR_RSTS; 112 sh_wdt_write_csr(csr); 115 csr = sh_wdt_read_rstcsr(); 116 csr 128 u8 csr; local 181 u8 csr; local [all...] |
/linux-master/drivers/usb/musb/ |
H A D | musb_gadget_ep0.c | 243 u16 csr; variable 266 csr = musb_readw(regs, MUSB_TXCSR); 267 csr |= MUSB_TXCSR_CLRDATATOG | 269 csr &= ~(MUSB_TXCSR_P_SENDSTALL | 272 musb_writew(regs, MUSB_TXCSR, csr); 274 csr = musb_readw(regs, MUSB_RXCSR); 275 csr |= MUSB_RXCSR_CLRDATATOG | 277 csr &= ~(MUSB_RXCSR_P_SENDSTALL | 279 musb_writew(regs, MUSB_RXCSR, csr); 403 u16 csr; variable 465 u16 count, csr; local 522 u16 csr = MUSB_CSR0_TXPKTRDY; local 643 u16 csr; local 997 u16 csr; local [all...] |
H A D | musb_gadget.c | 229 u16 fifo_count = 0, csr; local 248 csr = musb_readw(epio, MUSB_TXCSR); 254 if (csr & MUSB_TXCSR_TXPKTRDY) { 256 musb_ep->end_point.name, csr); 260 if (csr & MUSB_TXCSR_P_SENDSTALL) { 262 musb_ep->end_point.name, csr); 268 csr); 301 csr &= ~(MUSB_TXCSR_AUTOSET 303 musb_writew(epio, MUSB_TXCSR, csr 305 csr 408 u16 csr; local 526 u16 csr = musb_readw(epio, MUSB_RXCSR); local 792 u16 csr; local 918 u16 csr; local 1336 u16 csr; local 1457 u16 csr; local [all...] |
/linux-master/drivers/scsi/ |
H A D | sun3_scsi.c | 73 unsigned short csr; /* control/status reg */ member in struct:sun3_dma_regs 117 /* bits in csr reg */ 196 unsigned short csr = dregs->csr; local 200 dregs->csr &= ~CSR_DMA_ENABLE; 203 if(csr & ~CSR_GOOD) { 204 if (csr & CSR_DMA_BUSERR) 206 if (csr & CSR_DMA_CONFLICT) 211 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { 242 dregs->csr 348 unsigned short csr; local [all...] |
/linux-master/arch/mips/include/uapi/asm/ |
H A D | ucontext.h | 29 * @csr: the value of the MSA control & status register 40 unsigned int csr; member in struct:msa_extcontext
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/linux-master/arch/riscv/kvm/ |
H A D | aia.c | 71 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local 81 csr->hviph &= ~mask; 82 csr->hviph |= val; 88 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local 91 csr->vsieh = csr_read(CSR_VSIEH); 125 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; local 133 aia_set_hvictl(!!(csr->hvip & BIT(IRQ_VS_EXT))); 138 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local 143 csr_write(CSR_VSISELECT, csr->vsiselect); 144 csr_write(CSR_HVIPRIO1, csr 156 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local 176 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local 192 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; local [all...] |
/linux-master/arch/loongarch/include/asm/ |
H A D | kvm_csr.h | 14 #define gcsr_read(csr) \ 20 : [reg] "i" (csr) \ 25 #define gcsr_write(v, csr) \ 31 : [reg] "i" (csr) \ 35 #define gcsr_xchg(v, m, csr) \ 41 : [mask] "r" (m), [reg] "i" (csr) \ 181 #define kvm_save_hw_gcsr(csr, gid) (csr->csrs[gid] = gcsr_read(gid)) 182 #define kvm_restore_hw_gcsr(csr, gid) (gcsr_write(csr 186 kvm_read_sw_gcsr(struct loongarch_csrs *csr, int gid) argument 191 kvm_write_sw_gcsr(struct loongarch_csrs *csr, int gid, unsigned long val) argument 196 kvm_set_sw_gcsr(struct loongarch_csrs *csr, int gid, unsigned long val) argument 202 kvm_change_sw_gcsr(struct loongarch_csrs *csr, int gid, unsigned long mask, unsigned long val) argument [all...] |