Lines Matching refs:csr

243 				u16			csr;
266 csr = musb_readw(regs, MUSB_TXCSR);
267 csr |= MUSB_TXCSR_CLRDATATOG |
269 csr &= ~(MUSB_TXCSR_P_SENDSTALL |
272 musb_writew(regs, MUSB_TXCSR, csr);
274 csr = musb_readw(regs, MUSB_RXCSR);
275 csr |= MUSB_RXCSR_CLRDATATOG |
277 csr &= ~(MUSB_RXCSR_P_SENDSTALL |
279 musb_writew(regs, MUSB_RXCSR, csr);
403 u16 csr;
421 csr = musb_readw(regs, MUSB_TXCSR);
422 if (csr & MUSB_TXCSR_FIFONOTEMPTY)
423 csr |= MUSB_TXCSR_FLUSHFIFO;
424 csr |= MUSB_TXCSR_P_SENDSTALL
427 musb_writew(regs, MUSB_TXCSR, csr);
429 csr = musb_readw(regs, MUSB_RXCSR);
430 csr |= MUSB_RXCSR_P_SENDSTALL
434 musb_writew(regs, MUSB_RXCSR, csr);
465 u16 count, csr;
487 csr = MUSB_CSR0_P_SVDRXPKTRDY;
490 csr |= MUSB_CSR0_P_DATAEND;
494 csr = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL;
501 musb->ackpend = csr;
508 musb_writew(regs, MUSB_CSR0, csr);
522 u16 csr = MUSB_CSR0_TXPKTRDY;
546 csr |= MUSB_CSR0_P_DATAEND;
556 musb->ackpend = csr;
565 musb_writew(regs, MUSB_CSR0, csr);
643 u16 csr;
650 csr = musb_readw(regs, MUSB_CSR0);
653 musb_dbg(musb, "csr %04x, count %d, ep0stage %s",
654 csr, len, decode_ep0stage(musb->ep0_state));
656 if (csr & MUSB_CSR0_P_DATAEND) {
665 if (csr & MUSB_CSR0_P_SENTSTALL) {
667 csr & ~MUSB_CSR0_P_SENTSTALL);
670 csr = musb_readw(regs, MUSB_CSR0);
674 if (csr & MUSB_CSR0_P_SETUPEND) {
689 csr = musb_readw(regs, MUSB_CSR0);
701 if ((csr & MUSB_CSR0_TXPKTRDY) == 0) {
709 if (csr & MUSB_CSR0_RXPKTRDY) {
754 if (csr & MUSB_CSR0_RXPKTRDY)
774 if (csr & MUSB_CSR0_RXPKTRDY) {
842 musb_dbg(musb, "handled %d, csr %04x, ep0stage %s",
843 handled, csr,
997 u16 csr;
1016 csr = musb->ackpend;
1026 csr = musb_readw(regs, MUSB_CSR0);
1035 csr |= MUSB_CSR0_P_SENDSTALL;
1036 musb_writew(regs, MUSB_CSR0, csr);