Lines Matching refs:csr
10 static void enable_errsou_reporting(void __iomem *csr)
13 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK0, 0);
16 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK1, 0);
22 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK2,
30 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK3,
35 static void disable_errsou_reporting(void __iomem *csr)
40 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK0, ADF_GEN4_ERRSOU0_BIT);
43 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK1, ADF_GEN4_ERRSOU1_BITMASK);
46 val = ADF_CSR_RD(csr, ADF_GEN4_ERRMSK2);
48 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK2, val);
51 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK3, ADF_GEN4_ERRSOU3_BITMASK);
55 void __iomem *csr)
60 ADF_CSR_WR(csr, ADF_GEN4_HIAECORERRLOGENABLE_CPP0, ae_mask);
63 ADF_CSR_WR(csr, ADF_GEN4_HIAEUNCERRLOGENABLE_CPP0, ae_mask);
66 static void disable_ae_error_reporting(void __iomem *csr)
69 ADF_CSR_WR(csr, ADF_GEN4_HIAECORERRLOGENABLE_CPP0, 0);
72 ADF_CSR_WR(csr, ADF_GEN4_HIAEUNCERRLOGENABLE_CPP0, 0);
76 void __iomem *csr)
81 ADF_CSR_WR(csr, ADF_GEN4_HICPPAGENTCMDPARERRLOGENABLE,
84 ADF_CSR_WR(csr, ADF_GEN4_CPP_CFC_ERR_CTRL,
88 static void disable_cpp_error_reporting(void __iomem *csr)
91 ADF_CSR_WR(csr, ADF_GEN4_HICPPAGENTCMDPARERRLOGENABLE, 0);
93 ADF_CSR_WR(csr, ADF_GEN4_CPP_CFC_ERR_CTRL,
97 static void enable_ti_ri_error_reporting(void __iomem *csr)
102 ADF_CSR_WR(csr, ADF_GEN4_RI_MEM_PAR_ERR_EN0,
107 ADF_CSR_WR(csr, ADF_GEN4_RIMISCCTL, ADF_GEN4_RIMISCSTS_BIT);
110 ADF_CSR_WR(csr, ADF_GEN4_TI_CI_PAR_ERR_MASK, 0);
111 ADF_CSR_WR(csr, ADF_GEN4_TI_PULL0FUB_PAR_ERR_MASK, 0);
112 ADF_CSR_WR(csr, ADF_GEN4_TI_PUSHFUB_PAR_ERR_MASK, 0);
113 ADF_CSR_WR(csr, ADF_GEN4_TI_CD_PAR_ERR_MASK, 0);
114 ADF_CSR_WR(csr, ADF_GEN4_TI_TRNSB_PAR_ERR_MASK, 0);
117 ADF_CSR_WR(csr, ADF_GEN4_RICPPINTCTL, ADF_GEN4_RICPPINTCTL_BITMASK);
119 ADF_CSR_WR(csr, ADF_GEN4_TICPPINTCTL, ADF_GEN4_TICPPINTCTL_BITMASK);
125 reg = ADF_CSR_RD(csr, ADF_GEN4_TIMISCCTL);
128 ADF_CSR_WR(csr, ADF_GEN4_TIMISCCTL, reg);
131 static void disable_ti_ri_error_reporting(void __iomem *csr)
136 ADF_CSR_WR(csr, ADF_GEN4_RI_MEM_PAR_ERR_EN0, 0);
139 ADF_CSR_WR(csr, ADF_GEN4_RIMISCCTL, 0);
142 ADF_CSR_WR(csr, ADF_GEN4_TI_CI_PAR_ERR_MASK,
144 ADF_CSR_WR(csr, ADF_GEN4_TI_PULL0FUB_PAR_ERR_MASK,
146 ADF_CSR_WR(csr, ADF_GEN4_TI_PUSHFUB_PAR_ERR_MASK,
148 ADF_CSR_WR(csr, ADF_GEN4_TI_CD_PAR_ERR_MASK,
150 ADF_CSR_WR(csr, ADF_GEN4_TI_TRNSB_PAR_ERR_MASK,
154 ADF_CSR_WR(csr, ADF_GEN4_RICPPINTCTL, 0);
156 ADF_CSR_WR(csr, ADF_GEN4_TICPPINTCTL, 0);
162 reg = ADF_CSR_RD(csr, ADF_GEN4_TIMISCCTL);
164 ADF_CSR_WR(csr, ADF_GEN4_TIMISCCTL, reg);
168 void __iomem *csr)
173 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_SRC, 0);
174 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_ATH_CPH, 0);
175 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_CPR_XLT, 0);
176 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_DCPR_UCS, 0);
177 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_PKE, 0);
180 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_WAT_WCP, 0);
184 void __iomem *csr)
189 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_SRC,
192 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_ATH_CPH,
195 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_CPR_XLT,
198 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_DCPR_UCS,
201 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_PKE,
205 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITYMASK_WAT_WCP,
210 void __iomem *csr)
216 ADF_CSR_WR(csr, ADF_GEN4_INTMASKSSM, 0);
219 val = ADF_CSR_RD(csr, ADF_GEN4_SSMFEATREN);
221 ADF_CSR_WR(csr, ADF_GEN4_SSMFEATREN, val);
224 ADF_CSR_WR(csr, ADF_GEN4_SER_EN_SSMSH,
228 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_ATH_CPH, 0);
229 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_CPR_XLT, 0);
230 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_DCPR_UCS, 0);
231 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_PKE, 0);
234 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_WAT_WCP, 0);
237 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_ATH_CPH, 0);
238 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_CPR_XLT, 0);
239 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_DCPR_UCS, 0);
240 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_PKE, 0);
243 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_WAT_WCP, 0);
247 void __iomem *csr)
253 ADF_CSR_WR(csr, ADF_GEN4_INTMASKSSM,
257 val = ADF_CSR_RD(csr, ADF_GEN4_SSMFEATREN);
259 ADF_CSR_WR(csr, ADF_GEN4_SSMFEATREN, val);
262 ADF_CSR_WR(csr, ADF_GEN4_SER_EN_SSMSH, 0);
265 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_ATH_CPH,
268 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_CPR_XLT,
271 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_DCPR_UCS,
274 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_PKE,
278 ADF_CSR_WR(csr, ADF_GEN4_SPPPARERRMSK_WAT_WCP,
282 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_ATH_CPH,
285 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_CPR_XLT,
288 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_DCPR_UCS,
291 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_PKE,
295 ADF_CSR_WR(csr, ADF_GEN4_SHINTMASKSSM_WAT_WCP,
299 static void enable_aram_error_reporting(void __iomem *csr)
301 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMCERRUERR_EN,
304 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMCERR,
307 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMUERR,
310 ADF_CSR_WR(csr, ADF_GEN4_REG_CPPMEMTGTERR,
314 static void disable_aram_error_reporting(void __iomem *csr)
316 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMCERRUERR_EN, 0);
317 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMCERR, 0);
318 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMUERR, 0);
319 ADF_CSR_WR(csr, ADF_GEN4_REG_CPPMEMTGTERR, 0);
325 void __iomem *csr = adf_get_pmisc_base(accel_dev);
327 enable_errsou_reporting(csr);
328 enable_ae_error_reporting(accel_dev, csr);
329 enable_cpp_error_reporting(accel_dev, csr);
330 enable_ti_ri_error_reporting(csr);
331 enable_rf_error_reporting(accel_dev, csr);
332 enable_ssm_error_reporting(accel_dev, csr);
339 void __iomem *csr = adf_get_pmisc_base(accel_dev);
341 disable_errsou_reporting(csr);
342 disable_ae_error_reporting(csr);
343 disable_cpp_error_reporting(csr);
344 disable_ti_ri_error_reporting(csr);
345 disable_rf_error_reporting(accel_dev, csr);
346 disable_ssm_error_reporting(accel_dev, csr);
351 void __iomem *csr)
353 u32 aecorrerr = ADF_CSR_RD(csr, ADF_GEN4_HIAECORERRLOG_CPP0);
364 ADF_CSR_WR(csr, ADF_GEN4_HIAECORERRLOG_CPP0, aecorrerr);
368 void __iomem *csr, u32 errsou)
375 aeuncorerr = ADF_CSR_RD(csr, ADF_GEN4_HIAEUNCERRLOG_CPP0);
384 ADF_CSR_WR(csr, ADF_GEN4_HIAEUNCERRLOG_CPP0, aeuncorerr);
390 void __iomem *csr, u32 errsou)
398 cmdparerr = ADF_CSR_RD(csr, ADF_GEN4_HICPPAGENTCMDPARERRLOG);
407 ADF_CSR_WR(csr, ADF_GEN4_HICPPAGENTCMDPARERRLOG, cmdparerr);
413 void __iomem *csr, u32 errsou)
421 rimem_parerr_sts = ADF_CSR_RD(csr, ADF_GEN4_RIMEM_PARERR_STS);
440 ADF_CSR_WR(csr, ADF_GEN4_RIMEM_PARERR_STS, rimem_parerr_sts);
446 void __iomem *csr, u32 errsou)
453 ti_ci_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_CI_PAR_STS);
459 ADF_CSR_WR(csr, ADF_GEN4_TI_CI_PAR_STS, ti_ci_par_sts);
467 void __iomem *csr, u32 errsou)
474 ti_pullfub_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_PULL0FUB_PAR_STS);
481 ADF_CSR_WR(csr, ADF_GEN4_TI_PULL0FUB_PAR_STS,
491 void __iomem *csr, u32 errsou)
498 ti_pushfub_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_PUSHFUB_PAR_STS);
507 ADF_CSR_WR(csr, ADF_GEN4_TI_PUSHFUB_PAR_STS,
515 void __iomem *csr, u32 errsou)
522 ti_cd_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_CD_PAR_STS);
531 ADF_CSR_WR(csr, ADF_GEN4_TI_CD_PAR_STS, ti_cd_par_sts);
538 void __iomem *csr, u32 errsou)
545 ti_trnsb_par_sts = ADF_CSR_RD(csr, ADF_GEN4_TI_TRNSB_PAR_STS);
554 ADF_CSR_WR(csr, ADF_GEN4_TI_TRNSB_PAR_STS, ti_trnsb_par_sts);
561 void __iomem *csr, u32 errsou)
568 rimiscsts = ADF_CSR_RD(csr, ADF_GEN4_RIMISCSTS);
577 ADF_CSR_WR(csr, ADF_GEN4_RIMISCSTS, rimiscsts);
583 void __iomem *csr, u32 errsou,
586 *reset_required |= adf_handle_cpp_aeunc(accel_dev, csr, errsou);
587 *reset_required |= adf_handle_cppcmdparerr(accel_dev, csr, errsou);
588 *reset_required |= adf_handle_ri_mem_par_err(accel_dev, csr, errsou);
589 *reset_required |= adf_handle_ti_ci_par_sts(accel_dev, csr, errsou);
590 *reset_required |= adf_handle_ti_pullfub_par_sts(accel_dev, csr, errsou);
591 *reset_required |= adf_handle_ti_pushfub_par_sts(accel_dev, csr, errsou);
592 *reset_required |= adf_handle_ti_cd_par_sts(accel_dev, csr, errsou);
593 *reset_required |= adf_handle_ti_trnsb_par_sts(accel_dev, csr, errsou);
594 *reset_required |= adf_handle_iosfp_cmd_parerr(accel_dev, csr, errsou);
598 void __iomem *csr, u32 iastatssm)
605 reg = ADF_CSR_RD(csr, ADF_GEN4_UERRSSMSH);
614 ADF_CSR_WR(csr, ADF_GEN4_UERRSSMSH, reg);
620 void __iomem *csr, u32 iastatssm)
627 reg = ADF_CSR_RD(csr, ADF_GEN4_CERRSSMSH);
636 ADF_CSR_WR(csr, ADF_GEN4_CERRSSMSH, reg);
642 void __iomem *csr, u32 iastatssm)
649 reg = ADF_CSR_RD(csr, ADF_GEN4_PPERR);
658 ADF_CSR_WR(csr, ADF_GEN4_PPERR, reg);
664 void __iomem *csr, u32 slice_hang_offset,
667 u32 slice_hang_reg = ADF_CSR_RD(csr, slice_hang_offset);
679 void __iomem *csr, u32 iastatssm)
686 adf_poll_slicehang_csr(accel_dev, csr,
688 adf_poll_slicehang_csr(accel_dev, csr,
690 adf_poll_slicehang_csr(accel_dev, csr,
692 adf_poll_slicehang_csr(accel_dev, csr,
696 adf_poll_slicehang_csr(accel_dev, csr,
704 void __iomem *csr)
710 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLCMDPARERR_ATH_CPH);
718 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLCMDPARERR_ATH_CPH, reg);
723 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLCMDPARERR_CPR_XLT);
731 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLCMDPARERR_CPR_XLT, reg);
736 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLCMDPARERR_DCPR_UCS);
744 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLCMDPARERR_DCPR_UCS, reg);
749 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLCMDPARERR_PKE);
757 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLCMDPARERR_PKE, reg);
763 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLCMDPARERR_WAT_WCP);
771 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLCMDPARERR_WAT_WCP, reg);
781 void __iomem *csr)
786 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLDATAPARERR_ATH_CPH);
794 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLDATAPARERR_ATH_CPH, reg);
797 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLDATAPARERR_CPR_XLT);
805 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLDATAPARERR_CPR_XLT, reg);
808 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLDATAPARERR_DCPR_UCS);
816 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLDATAPARERR_DCPR_UCS, reg);
819 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLDATAPARERR_PKE);
827 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLDATAPARERR_PKE, reg);
831 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPULLDATAPARERR_WAT_WCP);
839 ADF_CSR_WR(csr, ADF_GEN4_SPPPULLDATAPARERR_WAT_WCP, reg);
847 void __iomem *csr)
853 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHCMDPARERR_ATH_CPH);
861 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHCMDPARERR_ATH_CPH, reg);
866 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHCMDPARERR_CPR_XLT);
874 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHCMDPARERR_CPR_XLT, reg);
879 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHCMDPARERR_DCPR_UCS);
887 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHCMDPARERR_DCPR_UCS, reg);
892 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHCMDPARERR_PKE);
901 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHCMDPARERR_PKE, reg);
907 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHCMDPARERR_WAT_WCP);
915 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHCMDPARERR_WAT_WCP, reg);
925 void __iomem *csr)
930 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHDATAPARERR_ATH_CPH);
938 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHDATAPARERR_ATH_CPH, reg);
941 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHDATAPARERR_CPR_XLT);
949 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHDATAPARERR_CPR_XLT, reg);
952 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHDATAPARERR_DCPR_UCS);
960 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHDATAPARERR_DCPR_UCS, reg);
963 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHDATAPARERR_PKE);
971 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHDATAPARERR_PKE, reg);
975 reg = ADF_CSR_RD(csr, ADF_GEN4_SPPPUSHDATAPARERR_WAT_WCP);
983 ADF_CSR_WR(csr, ADF_GEN4_SPPPUSHDATAPARERR_WAT_WCP,
992 void __iomem *csr, u32 iastatssm)
999 reset_required = adf_handle_spp_pullcmd_err(accel_dev, csr);
1000 reset_required |= adf_handle_spp_pulldata_err(accel_dev, csr);
1001 reset_required |= adf_handle_spp_pushcmd_err(accel_dev, csr);
1002 reset_required |= adf_handle_spp_pushdata_err(accel_dev, csr);
1008 void __iomem *csr, u32 iastatssm)
1018 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMCPPERR);
1041 ADF_CSR_WR(csr, ADF_GEN4_SSMCPPERR, reg);
1047 void __iomem *csr, u32 iastatssm)
1055 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_SRC);
1059 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_SRC, reg);
1062 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_ATH_CPH);
1066 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_ATH_CPH, reg);
1069 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_CPR_XLT);
1073 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_CPR_XLT, reg);
1076 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_DCPR_UCS);
1080 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_DCPR_UCS, reg);
1083 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_PKE);
1087 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_PKE, reg);
1091 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_WAT_WCP);
1095 ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_WAT_WCP,
1106 void __iomem *csr, u32 iastatssm)
1117 reg = ADF_CSR_RD(csr, ADF_GEN4_SER_ERR_SSMSH);
1153 ADF_CSR_WR(csr, ADF_GEN4_SER_ERR_SSMSH, reg);
1159 void __iomem *csr)
1161 u32 iastatssm = ADF_CSR_RD(csr, ADF_GEN4_IAINTSTATSSM);
1168 reset_required = adf_handle_uerrssmsh(accel_dev, csr, iastatssm);
1169 reset_required |= adf_handle_cerrssmsh(accel_dev, csr, iastatssm);
1170 reset_required |= adf_handle_pperr_err(accel_dev, csr, iastatssm);
1171 reset_required |= adf_handle_slice_hang_error(accel_dev, csr, iastatssm);
1172 reset_required |= adf_handle_spppar_err(accel_dev, csr, iastatssm);
1173 reset_required |= adf_handle_ssmcpppar_err(accel_dev, csr, iastatssm);
1174 reset_required |= adf_handle_rf_parr_err(accel_dev, csr, iastatssm);
1175 reset_required |= adf_handle_ser_err_ssmsh(accel_dev, csr, iastatssm);
1177 ADF_CSR_WR(csr, ADF_GEN4_IAINTSTATSSM, iastatssm);
1183 void __iomem *csr)
1185 u32 reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMCPR);
1196 ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMCPR, reg);
1202 void __iomem *csr)
1204 u32 reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMXLT);
1225 ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMXLT, reg);
1231 void __iomem *csr)
1237 reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMDCPR(i));
1257 ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMDCPR(i), reg);
1263 static bool adf_handle_ssm(struct adf_accel_dev *accel_dev, void __iomem *csr,
1271 reset_required = adf_handle_iaintstatssm(accel_dev, csr);
1272 reset_required |= adf_handle_exprpssmcmpr(accel_dev, csr);
1273 reset_required |= adf_handle_exprpssmxlt(accel_dev, csr);
1274 reset_required |= adf_handle_exprpssmdcpr(accel_dev, csr);
1280 void __iomem *csr, u32 errsou)
1288 reg = ADF_CSR_RD(csr, ADF_GEN4_CPP_CFC_ERR_STATUS);
1311 ADF_CSR_WR(csr, ADF_GEN4_CPP_CFC_ERR_STATUS_CLR,
1318 void __iomem *csr, u32 errsou,
1321 *reset_required |= adf_handle_ssm(accel_dev, csr, errsou);
1322 *reset_required |= adf_handle_cpp_cfc_err(accel_dev, csr, errsou);
1326 void __iomem *csr, u32 errsou)
1333 timiscsts = ADF_CSR_RD(csr, ADF_GEN4_TIMISCSTS);
1344 void __iomem *csr, u32 errsou)
1351 ricppintsts = ADF_CSR_RD(csr, ADF_GEN4_RICPPINTSTS);
1359 ADF_CSR_WR(csr, ADF_GEN4_RICPPINTSTS, ricppintsts);
1365 void __iomem *csr, u32 errsou)
1372 ticppintsts = ADF_CSR_RD(csr, ADF_GEN4_TICPPINTSTS);
1380 ADF_CSR_WR(csr, ADF_GEN4_TICPPINTSTS, ticppintsts);
1386 void __iomem *csr, u32 errsou)
1393 aram_cerr = ADF_CSR_RD(csr, ADF_GEN4_REG_ARAMCERR);
1403 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMCERR, aram_cerr);
1409 void __iomem *csr, u32 errsou)
1417 aramuerr = ADF_CSR_RD(csr, ADF_GEN4_REG_ARAMUERR);
1440 ADF_CSR_WR(csr, ADF_GEN4_REG_ARAMUERR, aramuerr);
1446 void __iomem *csr, u32 errsou)
1454 cppmemtgterr = ADF_CSR_RD(csr, ADF_GEN4_REG_CPPMEMTGTERR);
1476 ADF_CSR_WR(csr, ADF_GEN4_REG_CPPMEMTGTERR, cppmemtgterr);
1482 void __iomem *csr, u32 errsou)
1491 u32 atufaultstatus = ADF_CSR_RD(csr, ADF_GEN4_ATUFAULTSTATUS(i));
1502 ADF_CSR_WR(csr, ADF_GEN4_ATUFAULTSTATUS(i), atufaultstatus);
1510 void __iomem *csr, void __iomem *aram_csr,
1513 *reset_required |= adf_handle_timiscsts(accel_dev, csr, errsou);
1514 *reset_required |= adf_handle_ricppintsts(accel_dev, csr, errsou);
1515 *reset_required |= adf_handle_ticppintsts(accel_dev, csr, errsou);
1519 *reset_required |= adf_handle_atufaultstatus(accel_dev, csr, errsou);
1526 void __iomem *csr = adf_get_pmisc_base(accel_dev);
1527 u32 errsou = ADF_CSR_RD(csr, ADF_GEN4_ERRSOU0);
1533 adf_gen4_process_errsou0(accel_dev, csr);
1537 errsou = ADF_CSR_RD(csr, ADF_GEN4_ERRSOU1);
1539 adf_gen4_process_errsou1(accel_dev, csr, errsou, reset_required);
1543 errsou = ADF_CSR_RD(csr, ADF_GEN4_ERRSOU2);
1545 adf_gen4_process_errsou2(accel_dev, csr, errsou, reset_required);
1549 errsou = ADF_CSR_RD(csr, ADF_GEN4_ERRSOU3);
1551 adf_gen4_process_errsou3(accel_dev, csr, aram_csr, errsou, reset_required);