Searched refs:clk_khz (Results 1 - 9 of 9) sorted by relevance
| /linux-master/drivers/i2c/busses/ |
| H A D | i2c-img-scb.c | 1155 unsigned int clk_khz, bitrate_khz, clk_period, tckh, tckl, tsdh; local
1197 clk_khz = clk_get_rate(i2c->scb_clk) / 1000;
1200 prescale = SCB_OPT_INC * clk_khz / (256 * 16 * bitrate_khz);
1202 clk_khz /= prescale;
1205 inc = (256 * 16 * bitrate_khz) / clk_khz;
1215 if (clk_khz < 20000) {
1217 } else if (clk_khz < 40000) {
1221 filt = (64000 / ((clk_khz / 1000) * SCB_FILT_GLITCH));
1224 if (64000 % ((clk_khz / 1000) * SCB_FILT_GLITCH))
1236 clk_period = (256 * 1000000) / (clk_khz * in
[all...] |
| H A D | i2c-designware-platdrv.c | 348 u64 clk_khz; local
351 clk_khz = dev->get_clk_rate_khz(dev);
355 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
|
| /linux-master/drivers/net/wireless/st/cw1200/ |
| H A D | main.c | 488 u32 cw1200_dpll_from_clk(u16 clk_khz) argument
490 switch (clk_khz) {
515 clk_khz);
|
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.h | 184 uint32_t clk_khz,
|
| H A D | dcn10_hwseq.c | 3910 uint32_t clk_khz,
3923 if (clk_khz > clock_cfg.max_clock_khz)
3926 if (clk_khz < clock_cfg.min_clock_khz)
3929 if (clk_khz < clock_cfg.bw_requirequired_clock_khz)
3934 current_clocks->dispclk_khz = clk_khz;
3936 current_clocks->dppclk_khz = clk_khz;
3908 dcn10_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) argument
|
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 325 uint32_t clk_khz, uint32_t stepping);
|
| /linux-master/drivers/iio/adc/ |
| H A D | at91-sama5d2_adc.c | 955 u32 clk_khz = st->current_sample_rate / 1000; local
980 clk_khz / 1000, 1);
1007 clk_khz / 1000) - 1, 1);
|
| /linux-master/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 2374 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping);
|
| /linux-master/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 5119 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) argument
5122 return dc->hwss.set_clock(dc, clock_type, clk_khz, stepping);
|
Completed in 281 milliseconds