Searched refs:clk_ctrl (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/sys/mips/atheros/
H A Dqca953x_chip.c76 uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; local
114 clk_ctrl = ATH_READ_REG(QCA953X_PLL_CLK_CTRL_REG);
116 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
119 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
121 else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
126 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
129 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
131 else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
136 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
139 if (clk_ctrl
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H A Dqca955x_chip.c77 uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; local
115 clk_ctrl = ATH_READ_REG(QCA955X_PLL_CLK_CTRL_REG);
117 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
120 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
122 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
127 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
130 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
132 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
137 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
140 if (clk_ctrl
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H A Dar934x_chip.c92 uint32_t pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; local
157 clk_ctrl = ATH_READ_REG(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
159 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &
162 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS)
164 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL)
169 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &
172 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS)
174 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL)
179 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &
182 if (clk_ctrl
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/freebsd-11-stable/sys/dev/bwi/
H A Dif_bwi.c1104 uint32_t clk_ctrl, clk_src; local
1128 clk_ctrl = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1129 clk_src = __SHIFTOUT(clk_ctrl, BWI_CLOCK_CTRL_CLKSRC);
1133 clk_ctrl &= ~BWI_CLOCK_CTRL_SLOW;
1134 clk_ctrl |= BWI_CLOCK_CTRL_IGNPLL;
1137 clk_ctrl |= BWI_CLOCK_CTRL_SLOW;
1140 clk_ctrl &= ~(BWI_CLOCK_CTRL_SLOW |
1144 clk_ctrl |= BWI_CLOCK_CTRL_NODYN;
1149 CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);

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