/linux-master/include/linux/clk/ |
H A D | sunxi-ng.h | 9 int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode); 10 int sunxi_ccu_get_mmc_timing_mode(struct clk *clk);
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/linux-master/include/linux/ |
H A D | clk.h | 3 * linux/include/linux/clk.h 17 struct clk; 22 * DOC: clk notifier callback types 24 * PRE_RATE_CHANGE - called immediately before the clk rate is changed, 32 * the clk will be called with ABORT_RATE_CHANGE. Callbacks must 35 * POST_RATE_CHANGE - called after the clk rate change has successfully 44 * struct clk_notifier - associate a clk with a notifier 45 * @clk: struct clk * to associate the notifier with 46 * @notifier_head: a blocking_notifier_head for this clk 55 struct clk *clk; member in struct:clk_notifier 72 struct clk *clk; member in struct:clk_notifier_data 89 struct clk *clk; member in struct:clk_bulk_data 233 clk_notifier_register(struct clk *clk, struct notifier_block *nb) argument 239 clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) argument 245 devm_clk_notifier_register(struct device *dev, struct clk *clk, struct notifier_block *nb) argument 252 clk_get_accuracy(struct clk *clk) argument 257 clk_set_phase(struct clk *clk, int phase) argument 262 clk_get_phase(struct clk *clk) argument 267 clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) argument 273 clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) argument 284 clk_rate_exclusive_get(struct clk *clk) argument 289 devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) argument 294 clk_rate_exclusive_put(struct clk *clk) argument 328 clk_prepare(struct clk *clk) argument 341 clk_is_enabled_when_prepared(struct clk *clk) argument 360 clk_unprepare(struct clk *clk) argument 1016 clk_put(struct clk *clk) argument 1022 devm_clk_put(struct device *dev, struct clk *clk) argument 1024 clk_enable(struct clk *clk) argument 1035 clk_disable(struct clk *clk) argument 1041 clk_get_rate(struct clk *clk) argument 1046 clk_set_rate(struct clk *clk, unsigned long rate) argument 1051 clk_set_rate_exclusive(struct clk *clk, unsigned long rate) argument 1056 clk_round_rate(struct clk *clk, unsigned long rate) argument 1061 clk_has_parent(struct clk *clk, struct clk *parent) argument 1066 clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) argument 1072 clk_set_min_rate(struct clk *clk, unsigned long rate) argument 1077 clk_set_max_rate(struct clk *clk, unsigned long rate) argument 1082 clk_set_parent(struct clk *clk, struct clk *parent) argument 1087 clk_get_parent(struct clk *clk) argument 1107 clk_prepare_enable(struct clk *clk) argument 1122 clk_disable_unprepare(struct clk *clk) argument 1156 clk_drop_range(struct clk *clk) argument 1172 struct clk *clk = clk_get(dev, id); local [all...] |
/linux-master/include/linux/platform_data/x86/ |
H A D | clk-lpss.h | 15 struct clk *clk; member in struct:lpss_clk_data
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/linux-master/drivers/clk/imx/ |
H A D | Makefile | 3 mxc-clk-objs += clk.o 4 mxc-clk-objs += clk-busy.o 5 mxc-clk-objs += clk-composite-7ulp.o 6 mxc-clk-objs += clk-composite-8m.o 7 mxc-clk-objs += clk [all...] |
H A D | clk-imx27.c | 2 #include <linux/clk.h> 3 #include <linux/clk-provider.h> 13 #include "clk.h" 48 static struct clk *clk[IMX27_CLK_MAX]; variable in typeref:struct:clk 55 clk[IMX27_CLK_DUMMY] = imx_clk_fixed("dummy", 0); 56 clk[IMX27_CLK_CKIH] = imx_clk_fixed("ckih", fref); 57 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); 58 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); 59 clk[IMX27_CLK_CKIH_DIV1P [all...] |
/linux-master/arch/m68k/coldfire/ |
H A D | clk.c | 5 * clk.c -- general ColdFire CPU kernel clk handling 16 #include <linux/clk.h> 31 void __clk_init_enabled(struct clk *clk) argument 33 clk->enabled = 1; 34 clk->clk_ops->enable(clk); 37 void __clk_init_disabled(struct clk *clk) argument 43 __clk_enable0(struct clk *clk) argument 48 __clk_disable0(struct clk *clk) argument 59 __clk_enable1(struct clk *clk) argument 64 __clk_disable1(struct clk *clk) argument 76 clk_enable(struct clk *clk) argument 92 clk_disable(struct clk *clk) argument 106 clk_get_rate(struct clk *clk) argument 116 clk_round_rate(struct clk *clk, unsigned long rate) argument 123 clk_set_rate(struct clk *clk, unsigned long rate) argument 130 clk_set_parent(struct clk *clk, struct clk *parent) argument 137 clk_get_parent(struct clk *clk) argument [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | clkt2xxx_dpll.c | 11 #include <linux/clk.h> 22 * @clk: struct clk * of the DPLL to operate on 29 static void _allow_idle(struct clk_hw_omap *clk) argument 31 if (!clk || !clk->dpll_data) 39 * @clk: struct clk * of the DPLL to operate on 43 static void _deny_idle(struct clk_hw_omap *clk) argument 45 if (!clk || !cl [all...] |
/linux-master/arch/mips/loongson32/common/ |
H A D | time.c | 6 #include <linux/clk.h> 12 struct clk *clk = NULL; local 18 clk = clk_get(NULL, "cpu_clk"); 19 if (IS_ERR(clk)) 20 panic("unable to get cpu clock, err=%ld", PTR_ERR(clk)); 22 mips_hpt_frequency = clk_get_rate(clk) / 2;
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/linux-master/drivers/clk/x86/ |
H A D | Makefile | 2 obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-fch.o 3 obj-$(CONFIG_X86_INTEL_LPSS) += clk-lpss-atom.o clk-pmc-atom.o 4 obj-$(CONFIG_CLK_LGM_CGU) += clk-cgu.o clk-cgu-pll.o clk-lgm.o
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/linux-master/include/linux/platform_data/ |
H A D | mdio-bcm-unimac.h | 4 struct clk; 11 struct clk *clk; member in struct:unimac_mdio_pdata
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/linux-master/arch/mips/lantiq/ |
H A D | clk.c | 12 #include <linux/clk.h> 23 #include "clk.h" 27 static struct clk cpu_clk_generic[4]; 38 struct clk *clk_get_cpu(void) 43 struct clk *clk_get_fpi(void) 49 struct clk *clk_get_io(void) 55 struct clk *clk_get_ppe(void) 61 static inline int clk_good(struct clk *clk) argument 63 return clk 66 clk_get_rate(struct clk *clk) argument 81 clk_set_rate(struct clk *clk, unsigned long rate) argument 101 clk_round_rate(struct clk *clk, unsigned long rate) argument 118 clk_enable(struct clk *clk) argument 130 clk_disable(struct clk *clk) argument 140 clk_activate(struct clk *clk) argument 152 clk_deactivate(struct clk *clk) argument 162 clk_get_parent(struct clk *clk) argument 168 clk_set_parent(struct clk *clk, struct clk *parent) argument 192 struct clk *clk; local [all...] |
/linux-master/drivers/clk/mxs/ |
H A D | Makefile | 3 # Makefile for mxs specific clk 6 obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o clk-ssp.o 8 obj-$(CONFIG_SOC_IMX23) += clk-imx23.o 9 obj-$(CONFIG_SOC_IMX28) += clk-imx28.o
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/linux-master/drivers/clk/rockchip/ |
H A D | Makefile | 6 obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o 8 clk-rockchip-y += clk.o 9 clk-rockchip-y += clk-pll.o 10 clk-rockchip-y += clk-cpu.o 11 clk-rockchip-y += clk-half-divider.o 12 clk [all...] |
/linux-master/drivers/clk/ralink/ |
H A D | Makefile | 2 obj-$(CONFIG_CLK_MT7621) += clk-mt7621.o 3 obj-$(CONFIG_CLK_MTMIPS) += clk-mtmips.o
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/linux-master/drivers/clk/axis/ |
H A D | Makefile | 2 obj-$(CONFIG_MACH_ARTPEC6) += clk-artpec6.o
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/linux-master/drivers/clk/imgtec/ |
H A D | Makefile | 2 obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o
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/linux-master/drivers/clk/pxa/ |
H A D | Makefile | 2 obj-y += clk-pxa.o 3 obj-$(CONFIG_PXA25x) += clk-pxa25x.o 4 obj-$(CONFIG_PXA27x) += clk-pxa27x.o 5 obj-$(CONFIG_PXA3xx) += clk-pxa3xx.o
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/linux-master/drivers/clk/pistachio/ |
H A D | Makefile | 2 obj-y += clk.o 3 obj-y += clk-pll.o 4 obj-y += clk-pistachio.o
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/linux-master/drivers/clk/socfpga/ |
H A D | Makefile | 2 obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \ 3 clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o 4 obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ 5 clk-pll-s10.o clk [all...] |
/linux-master/sound/soc/fsl/ |
H A D | fsl_utils.h | 23 void fsl_asoc_get_pll_clocks(struct device *dev, struct clk **pll8k_clk, 24 struct clk **pll11k_clk); 26 void fsl_asoc_reparent_pll_clocks(struct device *dev, struct clk *clk, 27 struct clk *pll8k_clk, 28 struct clk *pll11k_clk, u64 ratio);
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/linux-master/drivers/clk/mmp/ |
H A D | Makefile | 3 # Makefile for mmp specific clk 6 obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o 10 obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o 11 obj-$(CONFIG_COMMON_CLK_MMP2) += clk [all...] |
/linux-master/drivers/clk/mediatek/ |
H A D | Makefile | 2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o reset.o clk-mux.o 3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o 5 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o 6 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk [all...] |
/linux-master/drivers/clk/versatile/ |
H A D | Makefile | 3 obj-$(CONFIG_CLK_ICST) += icst.o clk-icst.o clk-versatile.o 4 obj-$(CONFIG_INTEGRATOR_IMPD1) += clk-impd1.o 5 obj-$(CONFIG_CLK_SP810) += clk-sp810.o 6 obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk-vexpress-osc.o
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/linux-master/drivers/clk/bcm/ |
H A D | Makefile | 2 obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o 3 obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o 4 obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o 5 obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o 6 obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o 7 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o 8 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o 9 obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk [all...] |
/linux-master/drivers/sh/clk/ |
H A D | cpg.c | 11 #include <linux/clk.h> 19 static unsigned int sh_clk_read(struct clk *clk) argument 21 if (clk->flags & CLK_ENABLE_REG_8BIT) 22 return ioread8(clk->mapped_reg); 23 else if (clk->flags & CLK_ENABLE_REG_16BIT) 24 return ioread16(clk->mapped_reg); 26 return ioread32(clk->mapped_reg); 29 static void sh_clk_write(int value, struct clk *clk) argument 39 sh_clk_mstp_enable(struct clk *clk) argument 68 sh_clk_mstp_disable(struct clk *clk) argument 97 clk_to_div_table(struct clk *clk) argument 102 clk_to_div_mult_table(struct clk *clk) argument 110 sh_clk_div_round_rate(struct clk *clk, unsigned long rate) argument 115 sh_clk_div_recalc(struct clk *clk) argument 128 sh_clk_div_set_rate(struct clk *clk, unsigned long rate) argument 150 sh_clk_div_enable(struct clk *clk) argument 162 sh_clk_div_disable(struct clk *clk) argument 194 sh_clk_init_parent(struct clk *clk) argument 279 sh_clk_div6_set_parent(struct clk *clk, struct clk *parent) argument 336 sh_clk_div4_set_parent(struct clk *clk, struct clk *parent) argument 395 fsidiv_recalc(struct clk *clk) argument 408 fsidiv_round_rate(struct clk *clk, unsigned long rate) argument 413 fsidiv_disable(struct clk *clk) argument 418 fsidiv_enable(struct clk *clk) argument 431 fsidiv_set_rate(struct clk *clk, unsigned long rate) argument [all...] |