#
d3a0946d |
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24-Jul-2023 |
Shengjiu Wang <shengjiu.wang@nxp.com> |
clk: imx: imx8: add audio clock mux driver The Audio Clock Mux (ACM) is a collection of control registers and multiplexers that are used to route the audio source clocks to the audio peripherals. Each audio peripheral has its dedicated audio clock mux (which differ based on usage) and control register. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/1690260984-25744-3-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
6cd95f7b |
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01-Mar-2023 |
Marek Vasut <marex@denx.de> |
clk: imx: imx8mp: Add audiomix block control Unlike the other block control IPs in i.MX8M, the audiomix is mostly a series of clock gates and muxes. Model it as a large static table of gates and muxes with one exception, which is the PLL14xx . The PLL14xx SAI PLL has to be registered separately. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230301163257.49005-2-marex@denx.de
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#
ee394f63 |
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31-Jan-2023 |
Oleksij Rempel <linux@rempel-privat.de> |
clk: imx: add clk-gpr-mux driver Almost(?) every i.MX variant has clk mux for ethernet (rgmii/rmii) reference clock located in the GPR1 register. So far this clk is configured in different ways: - mach-imx6q is doing mux configuration based on ptp vs enet_ref clk comparison. - mach-imx7d is setting mux to PAD for all boards - mach-imx6ul is setting mux to internal clock for all boards. Since we have imx7d and imx6ul board variants which do not work with configurations forced by kernel mach code, we need to implement this clk mux properly as part of the clk framework. Which is done by this patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230131084642.709385-2-o.rempel@pengutronix.de
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#
0836c860 |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: add i.MX93 clk gate i.MX93 LPCG is different from i.MX8M CCGR. Although imx_clk_hw_gate4_flags is used here, it not strictly match i.MX93. i.MX93 has such design: - LPCG_DIRECT use BIT0 as on/off gate when LPCG_AUTHEN CPU_LPM is 0 - LPCG_LPM_CUR use BIT[2:0] as on/off gate when LPCG_AUTHEN CPU_LPM is 1 The current implementation suppose CPU_LPM is 0, and use LPCG_DIRECT BIT[1:0] as on/off gate. Although BIT1 is touched, actually BIT1 is reserved. And imx_clk_hw_gate4_flags use mask 0x3 to determine whether the clk is enabled or not, but i.MX93 LPCG only use BIT0 to control when CPU_LPM is 0. So clk disabled unused during kernel boot not able to gate off the unused clocks. To match i.MX93 LPCG, introduce imx93_clk_gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-6-peng.fan@oss.nxp.com
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#
24defbe194 |
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27-Feb-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: add i.MX93 clk Add i.MX93 clk driver. i.MX93 clk hardware design is different compared with i.MX8M. It supports 4 sources for each clk root and the sources are separated into a few groups, low speed/fast io/audio and etc. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-6-peng.fan@oss.nxp.com [abel.vesa@nxp.com: Added missing module license and description] Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
1b26cb8a |
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27-Feb-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: support fracn gppll This PLL module is a Fractional-N synthesizer, supporting 30-bit numerator and denominator. Numerator is a signed number. It has feature to adjust fractional portion of feedback divider dynamically. This fracn gppll is used in i.MX93. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-5-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
11994196 |
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27-Feb-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: add i.MX93 composite clk i.MX93 CCM ROOT clock has a mux, gate and divider in one register, here is to combine all these into one composite clk and simplify clk tree. i.MX93 CCM is a new IP compared with i.MX8M, so introduce a new file. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
036a4b4b |
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17-Dec-2021 |
Jacky Bai <ping.bai@nxp.com> |
clk: imx: Add imx8dxl clk driver Add files for imx8dxl clk driver which is based on imx8qxp clock driver. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/1639747533-9778-1-git-send-email-abel.vesa@nxp.com
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#
7154b046 |
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11-Jan-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imx: Add initial support for i.MXRT1050 clock driver Add clock driver support for i.MXRT1050. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220111215415.2075257-6-Mr.Bossman075@gmail.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
c43a801a |
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14-Sep-2021 |
Jacky Bai <ping.bai@nxp.com> |
clk: imx: Add clock driver for imx8ulp Add clock driver for i.MX8ULP. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20210914065208.3582128-9-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
afd0406b |
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22-Apr-2021 |
Dong Aisheng <aisheng.dong@nxp.com> |
clk: imx8qm: add clock valid resource checking Add imx8qm clock valid resource checking mechanism Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
5964012c |
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22-Apr-2021 |
Dong Aisheng <aisheng.dong@nxp.com> |
clk: imx8qxp: add clock valid checking mechnism clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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#
80583774 |
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16-Sep-2020 |
Fabio Estevam <festevam@gmail.com> |
clk: imx: imx21: Remove clock driver As i.MX21 support has been removed, get rid of its clock driver too. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
e0d0d4d8 |
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29-Jul-2020 |
Anson Huang <Anson.Huang@nxp.com> |
clk: imx8qxp: Support building i.MX8QXP clock driver as module Change configuration to "tristate", add module author, description and license to support building i.MX8QXP clock drivers as module. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
f1f018dc |
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29-Jul-2020 |
Anson Huang <Anson.Huang@nxp.com> |
clk: imx: Add clock configuration for ARMv7 platforms Add CONFIG_CLK_xxx for i.MX ARMv7 platforms, and use it as build option instead of CONFIG_SOC_xxx, the CONFIG_CLK_xxx will be selected by default according to CONFIG_SOC_xxx. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
870ed5e2 |
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29-Jul-2020 |
Anson Huang <Anson.Huang@nxp.com> |
clk: imx: Support building i.MX common clock driver as module There are more and more requirements of building SoC specific drivers as modules, add support for building i.MX common clock driver as module to meet the requirement. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
9c140d99 |
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07-Jan-2020 |
Anson Huang <Anson.Huang@nxp.com> |
clk: imx: Add support for i.MX8MP clock driver Add clock driver support for i.MX8MP which is a new SoC of i.MX8M family. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
ba7928d9 |
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11-Dec-2019 |
Abel Vesa <abel.vesa@nxp.com> |
clk: imx: Rename the SCCG to SSCG According to the manual the acronym stands for Spread Sprectum Clock Generator. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
96d6392b |
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18-Jun-2019 |
Anson Huang <Anson.Huang@nxp.com> |
clk: imx: Add support for i.MX8MN clock driver This patch adds i.MX8MN clock driver support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
de348df5 |
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03-Apr-2019 |
Shawn Guo <shawnguo@kernel.org> |
clk: imx: rename clk-imx51-imx53.c to clk-imx5.c As the driver is handling all i.MX5 series SoCs inlcuding i.MX50, rather than just i.MX51 and i.MX53, let's rename it to clk-imx5.c. Signed-off-by: Shawn Guo <shawnguo@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
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#
ba5625c3 |
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22-Jan-2019 |
Bai Ping <ping.bai@nxp.com> |
clk: imx: Add clock driver support for imx8mm Add clock driver support for i.MX8MM SOC. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
8646d4dc |
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22-Jan-2019 |
Bai Ping <ping.bai@nxp.com> |
clk: imx: Add PLLs driver for imx8mm soc New PLLs are introduced on i.MX8M Mini SOC. PLL1416X is Integer PLL, PLL1443X is a Frac PLL. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
1e3121bf |
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13-Dec-2018 |
Aisheng Dong <aisheng.dong@nxp.com> |
clk: imx: add imx8qxp lpcg driver Add imx8qxp lpcg driver support Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
2f77296d |
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13-Dec-2018 |
Aisheng Dong <aisheng.dong@nxp.com> |
clk: imx: add lpcg clock support The Low-Power Clock Gate (LPCG) modules contain a local programming model to control the clock gates for the peripherals. An LPCG module is used to locally gate the clocks for the associated peripheral. And they're bedind the SCU clock. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
c2cccb6d |
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13-Dec-2018 |
Aisheng Dong <aisheng.dong@nxp.com> |
clk: imx: add imx8qxp clk driver Add imx8qxp clk driver which is based on SCU firmware clock service. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Move the makefile rule higher in the file] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
d360b130 |
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14-Dec-2018 |
Abel Vesa <abel.vesa@nxp.com> |
clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant Remove the dependency between the i.MX8MQ CCM clock driver and the CONFIG_SOC_IMX8MQ and use CONFIG_CLK_IMX8MQ instead. CONFIG_CLK_IMX8MQ depends on ARCH_MXC && ARM64. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
fe37b482 |
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13-Dec-2018 |
Aisheng Dong <aisheng.dong@nxp.com> |
clk: imx: add scu clock common part Add SCU clock common part which will be used by client clock drivers. SCU clocks are totally different from the legacy clocks (No much legacy things can be reused), it's using a firmware interface now based on SCU protocol. So a new configuration option CONFIG_MXC_CLK_SCU is added. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Mark ccm_ipc_handle static] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
3a48d918 |
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13-Dec-2018 |
Aisheng Dong <aisheng.dong@nxp.com> |
clk: imx: add configuration option for mmio clks The patch introduces CONFIG_MXC_CLK option for legacy MMIO clocks, this is required to compile legacy MMIO clock conditionally when adding SCU based clocks for MX8 platforms later. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
b1260067 |
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14-Nov-2018 |
A.s. Dong <aisheng.dong@nxp.com> |
clk: imx: add imx7ulp clk driver i.MX7ULP Clock functions are under joint control of the System Clock Generation (SCG) modules, Peripheral Clock Control (PCC) modules, and Core Mode Controller (CMC)1 blocks The clocking scheme provides clear separation between M4 domain and A7 domain. Except for a few clock sources shared between two domains, such as the System Oscillator clock, the Slow IRC (SIRC), and and the Fast IRC clock (FIRCLK), clock sources and clock management are separated and contained within each domain. M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules. A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules. This driver only adds clock support in A7 domain. Note that most clocks required to be operated when gated, e.g. pll, pfd, pcc. And more special cases that scs/ddr/nic mux selecting different clock source requires that clock to be enabled first, then we need set CLK_OPS_PARENT_ENABLE flag for them properly. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
76a323c1 |
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14-Nov-2018 |
A.s. Dong <aisheng.dong@nxp.com> |
clk: imx: add imx7ulp composite clk support The imx composite clk is designed for Peripheral Clock Control (PCC) module observed in IMX ULP SoC series. NOTE pcc can only be operated when clk is gated. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
9fcb6be3 |
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14-Nov-2018 |
A.s. Dong <aisheng.dong@nxp.com> |
clk: imx: add pfdv2 support The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP. NOTE pfdv2 can only be operated when clk is gated. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
d9a8f950 |
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14-Nov-2018 |
A.s. Dong <aisheng.dong@nxp.com> |
clk: imx: add pllv4 support pllv4 is designed for System Clock Generation (SCG) module observed in IMX ULP SoC series. e.g. i.MX7ULP. The SCG modules generates clock used to derive processor, system, peripheral bus and external memory interface clocks while this patch intends to support the PLL part. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
40468079 |
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14-Nov-2018 |
A.s. Dong <aisheng.dong@nxp.com> |
clk: imx: add gatable clock divider support For dividers with zero indicating clock is disabled, instead of giving a warning each time like "clkx: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set" in exist code, we'd like to introduce enable/disable function for it. e.g. 000b - Clock disabled 001b - Divide by 1 010b - Divide by 2 ... Set rate when the clk is disabled will cache the rate request and only when the clk is enabled will the driver actually program the hardware to have the requested divider value. Similarly, when the clk is disabled we'll write a 0 there, but when the clk is enabled we'll restore whatever rate (divider) was chosen last. It does mean that recalc rate will be sort of odd, because when the clk is off it will return 0, and when the clk is on it will return the right rate. So to make things work, we'll need to return the cached rate in recalc rate when the clk is off and read the hardware when the clk is on. NOTE for the default off divider, the recalc rate will still return 0 as there's still no proper preset rate. Enable such divider will give user a reminder error message. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
ff70fbd0 |
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01-Dec-2018 |
Lucas Stach <l.stach@pengutronix.de> |
clk: imx: Add SCCG PLL type The SCCG is a new PLL type introduced on i.MX8. The description of this SCCG clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
6209624b |
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01-Dec-2018 |
Lucas Stach <l.stach@pengutronix.de> |
clk: imx: Add fractional PLL output clock This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
b8052204 |
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01-Dec-2018 |
Abel Vesa <abel.vesa@nxp.com> |
clk: imx: Add clock driver for i.MX8MQ CCM Add driver for the Clock Control Module found on i.MX8MQ. Signed-off-by: Anson Huang <anson.huang@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
d3ff9728 |
|
01-Dec-2018 |
Abel Vesa <abel.vesa@nxp.com> |
clk: imx: Add imx composite clock Since a lot of clocks on imx8m are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one composite clock, but we need to deal with both predivider and divider at the same time and therefore we add the imx8m_clk_composite_divider_ops and register the composite clock with those. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Suggested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
4a5f720b |
|
19-Mar-2018 |
Bai Ping <ping.bai@nxp.com> |
clk: imx: add clock driver for imx6sll Add clk driver support for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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b2441318 |
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01-Nov-2017 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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787b4271 |
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09-Jul-2015 |
Frank Li <Frank.Li@freescale.com> |
clk: imx: add imx6ul clk tree support Add imx6ul clock driver support. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Bai Ping <b51503@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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8f6d8094 |
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18-May-2015 |
Frank Li <Frank.Li@freescale.com> |
ARM: imx: add imx7d clk tree support Add i.MX7D clk tree support. Enable all clock to bring up imx7. Clock framework need be modified a little since imx7d change clock design. otherwise system will halt and block the other part upstream. All clock refine need wait for Dong Aisheng's patch clk: support clocks which requires parent clock on during operation Or other solution ready. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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11f68120 |
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26-Apr-2015 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: imx: move clock drivers into drivers/clk After the cleanup on clock drivers, they are now ready to be moved into drivers/clk. Let's move them into drivers/clk/imx folder. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
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