Searched refs:chips (Results 1 - 25 of 121) sorted by relevance

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/linux-master/drivers/gpio/
H A Dgpio-davinci.c195 struct davinci_gpio_controller *chips; local
228 chips = devm_kzalloc(dev, sizeof(*chips), GFP_KERNEL);
229 if (!chips)
237 chips->irqs[i] = platform_get_irq(pdev, i);
238 if (chips->irqs[i] < 0)
239 return chips->irqs[i];
242 chips->chip.label = dev_name(dev);
244 chips->chip.direction_input = davinci_direction_in;
245 chips
431 struct davinci_gpio_controller *chips = local
485 struct davinci_gpio_controller *chips = platform_get_drvdata(pdev); local
619 davinci_gpio_save_context(struct davinci_gpio_controller *chips, u32 nbank) argument
643 davinci_gpio_restore_context(struct davinci_gpio_controller *chips, u32 nbank) argument
672 struct davinci_gpio_controller *chips = dev_get_drvdata(dev); local
683 struct davinci_gpio_controller *chips = dev_get_drvdata(dev); local
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/linux-master/sound/usb/6fire/
H A Dchip.c33 static struct sfire_chip *chips[SNDRV_CARDS] = SNDRV_DEFAULT_PTR; variable in typeref:struct:sfire_chip
94 if (chips[i])
95 chips[i]->intf_count++;
96 usb_set_intfdata(intf, chips[i]);
134 chips[regidx] = chip;
179 chips[chip->regidx] = NULL;
/linux-master/drivers/i2c/muxes/
H A Di2c-mux-pca954x.c9 * chips made by NXP Semiconductors.
14 * It's also compatible to Maxims MAX735x I2C switch chips, which are controlled
15 * as the NXP PCA9548 and the MAX736x chips that act like the PCA9544.
20 * These chips are all controlled via the I2C bus itself, and all have a
126 static const struct chip_desc chips[] = { variable in typeref:struct:chip_desc
276 { .compatible = "maxim,max7356", .data = &chips[max_7356] },
277 { .compatible = "maxim,max7357", .data = &chips[max_7357] },
278 { .compatible = "maxim,max7358", .data = &chips[max_7358] },
279 { .compatible = "maxim,max7367", .data = &chips[max_7367] },
280 { .compatible = "maxim,max7368", .data = &chips[max_736
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H A Di2c-mux-ltc4306.c52 static const struct chip_desc chips[] = { variable in typeref:struct:chip_desc
201 { .compatible = "lltc,ltc4305", .data = &chips[ltc_4305] },
202 { .compatible = "lltc,ltc4306", .data = &chips[ltc_4306] },
221 chip = &chips[i2c_match_id(ltc4306_id, client)->driver_data];
/linux-master/drivers/pwm/
H A Dpwm-dwc.c51 ddata->chips[idx] = chip;
74 ddata = devm_kzalloc(dev, struct_size(ddata, chips, info->nr), GFP_KERNEL);
111 struct pwm_chip *chip = ddata->chips[idx];
136 struct pwm_chip *chip = ddata->chips[idx];
H A Dpwm-dwc.h44 struct pwm_chip *chips[]; member in struct:dwc_pwm_drvdata
/linux-master/drivers/cpufreq/
H A Dpowernv-cpufreq.c141 } *chips; variable in typeref:struct:chip
988 chips[i].restore = true;
989 schedule_work(&chips[i].throttle);
996 if (chips[i].id == omsg.chip)
1001 chips[i].throttle_reason = omsg.throttle_status;
1002 chips[i].reason[omsg.throttle_status]++;
1006 chips[i].restore = true;
1008 schedule_work(&chips[i].throttle);
1057 /* Allocate a chip cpu mask large enough to fit mask for all chips */
1074 chips
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/linux-master/drivers/media/platform/
H A DMakefile14 obj-y += chips-media/
/linux-master/drivers/mtd/
H A DMakefile29 obj-y += chips/ lpddr/ maps/ devices/ nand/ tests/
/linux-master/drivers/mtd/nand/spi/
H A Dato.c83 .chips = ato_spinand_table,
H A Dforesee.c92 .chips = foresee_spinand_table,
H A Dparagon.c128 .chips = paragon_spinand_table,
H A Dalliancememory.c150 .chips = alliancememory_spinand_table,
H A Desmt.c144 .chips = esmt_c8_spinand_table,
/linux-master/drivers/pinctrl/
H A Dpinctrl-mcp23s08_spi.c15 * A given spi_device can represent up to eight mcp23sxx chips
17 * (e.g. chips #0 and #3 might be populated, but not #1 or #2).
144 int chips; local
165 chips = hweight_long(spi_present_mask);
167 data = devm_kzalloc(dev, struct_size(data, chip, chips), GFP_KERNEL);
174 data->mcp[addr] = &data->chip[--chips];
/linux-master/include/linux/mtd/
H A Dqinfo.h17 * @numchips - number of chips including virual RWW partitions
19 * @chips - per-chip data structure
27 struct flchip chips[] __counted_by(numchips);
/linux-master/drivers/mtd/chips/
H A Dcfi_cmdset_0001.c45 /* Intel chips */
50 /* STMicroelectronics chips */
54 /* Atmel chips */
57 /* Sharp chips */
171 /* Atmel chips don't use the same PRI format as Intel chips */
320 * Some chips power-up with all sectors locked by default.
565 cfi->chips[i].word_write_time =
568 cfi->chips[i].word_write_time = 50000;
571 cfi->chips[
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H A Dgen_probe.c105 * Allocate memory for bitmap of valid chips.
123 * Now probe for other chips, checking sensibly for aliases while
137 retcfi = kmalloc(struct_size(retcfi, chips, cfi.numchips), GFP_KERNEL);
146 memset(&retcfi->chips[0], 0, sizeof(struct flchip) * cfi.numchips);
150 struct flchip *pchip = &retcfi->chips[j++];
H A Dcfi_cmdset_0002.c289 /* Atmel chips don't use the same PRI format as AMD chips */
303 /* Some chips got it backwards... */
323 /* Setup for chips with a secsi area */
340 * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors
451 /* Used to fix CFI-Tables of chips without Extended Query Tables */
518 * Samsung K8P2815UQB and K8D6x16UxM chips
520 * K8D3x16UxC chips report major=3 / minor=3.
530 * SST 38VF640x chips report major=0xFF / minor=0xFF.
731 cfi->chips[
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H A Dcfi_cmdset_0020.c156 cfi->chips[i].word_write_time = 128;
157 cfi->chips[i].buffer_write_time = 128;
158 cfi->chips[i].erase_time = 1024;
159 cfi->chips[i].ref_point_counter = 0;
160 init_waitqueue_head(&(cfi->chips[i].wq));
176 //printk(KERN_DEBUG "number of CFI chips: %d\n", cfi->numchips);
215 printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
407 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
634 ret = do_write_buffer(map, &cfi->chips[chipnum],
856 printk(KERN_WARNING "Status is not identical for all chips
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/linux-master/drivers/hwmon/pmbus/
H A Ducd9200.c21 enum chips { ucd9200, ucd9220, ucd9222, ucd9224, ucd9240, ucd9244, ucd9246, enum
79 enum chips chip;
H A Dbel-pfe.c17 enum chips {pfe1100, pfe3000}; enum
H A Dq54sj108a2.c23 enum chips { enum
48 enum chips chip;
281 enum chips chip_id;
294 chip_id = (enum chips)(unsigned long)of_device_get_match_data(dev);
310 * The chips support reading PMBUS_MFR_MODEL.
H A Dmax16601.c35 enum chips { max16508, max16600, max16601, max16602 }; enum
50 enum chips id;
278 enum chips id;
/linux-master/drivers/mtd/nand/raw/
H A Dnand_bbt.c253 * @chip: read the table for a specific chip, -1 read all chips; applies only if
256 * Read the bad block table for all chips starting at a given page. We assume
380 * read_abs_bbts - [GENERIC] Read the bad block table(s) for all chips starting at a given page
386 * Read the bad block table(s) for all chips starting at a given page. We
484 * @chip: create the table for a specific chip, -1 read all chips; applies only
506 pr_warn("create_bbt(): chipnr (%d) > available chips (%d)\n",
557 int i, chips; local
574 chips = nanddev_ntargets(&this->base);
578 chips = 1;
581 for (i = 0; i < chips;
952 int i, chips, writeops, create, chipsel, res, res2; local
1133 int i, j, chips, block, nrblocks, update; local
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