Searched refs:cfg (Results 1 - 25 of 1693) sorted by relevance

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/linux-master/drivers/phy/
H A Dphy-core-mipi-dphy.c24 struct phy_configure_opts_mipi_dphy *cfg)
28 if (!cfg)
39 cfg->clk_miss = 0;
40 cfg->clk_post = 60000 + 52 * ui;
41 cfg->clk_pre = 8;
42 cfg->clk_prepare = 38000;
43 cfg->clk_settle = 95000;
44 cfg->clk_term_en = 0;
45 cfg->clk_trail = 60000;
46 cfg
20 phy_mipi_dphy_calc_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, unsigned long long hs_clk_rate, struct phy_configure_opts_mipi_dphy *cfg) argument
81 phy_mipi_dphy_get_default_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) argument
91 phy_mipi_dphy_get_default_config_for_hsclk(unsigned long long hs_clk_rate, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) argument
107 phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg) argument
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/linux-master/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_config.h56 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
57 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs)
58 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
59 #define CFG_GET_IQ_INSTR_SIZE(cfg) (64)
60 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min)
61 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cf
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/linux-master/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_config.h60 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
61 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs)
62 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
63 #define CFG_GET_IQ_INSTR_SIZE(cfg) (64)
64 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min)
65 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cf
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/linux-master/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.c22 u32 cfg; local
25 cfg = readl(dev->regs + GSC_SW_RESET);
26 if (!cfg)
36 u32 cfg; local
38 cfg = readl(dev->regs + GSC_IRQ);
40 cfg |= GSC_IRQ_FRMDONE_MASK;
42 cfg &= ~GSC_IRQ_FRMDONE_MASK;
43 writel(cfg, dev->regs + GSC_IRQ);
48 u32 cfg; local
50 cfg
61 u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK); local
75 u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK); local
111 u32 cfg = readl(dev->regs + GSC_IN_CON); local
124 u32 cfg; local
146 u32 cfg; local
167 u32 cfg; local
222 u32 cfg = readl(dev->regs + GSC_OUT_CON); local
237 u32 cfg; local
266 u32 cfg; local
287 u32 cfg; local
346 u32 cfg; local
358 u32 cfg; local
370 u32 cfg; local
404 u32 cfg; local
421 u32 cfg; local
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/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Docteon_config.h121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs)
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size)
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)
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/linux-master/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-lite-reg.c23 u32 cfg; local
25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
26 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ;
27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
31 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY)
36 cfg |= FLITE_REG_CIGCTRL_SWRST;
37 writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); local
43 cfg
56 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); local
63 u32 cfg, intsrc; local
85 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); local
92 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); local
103 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); local
131 u32 cfg; local
161 u32 cfg; local
179 u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL); local
191 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); local
219 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); local
238 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); local
250 u32 cfg; local
268 u32 cfg; local
287 u32 cfg; local
301 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); local
343 u32 cfg = readl(dev->regs + registers[i].offset); local
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H A Dfimc-reg.c21 u32 cfg; local
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT);
24 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT;
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT);
28 cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
29 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL);
30 writel(cfg, dev->regs + FIMC_REG_CIGCTRL);
33 cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
34 cfg &= ~FIMC_REG_CIGCTRL_SWRST;
35 writel(cfg, de
73 u32 cfg, flip; local
106 u32 cfg; local
151 u32 cfg; local
172 u32 cfg; local
213 u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE); local
223 u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); local
235 u32 cfg, shfactor; local
254 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); local
316 u32 cfg; local
349 u32 cfg; local
365 u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); local
375 u32 cfg = 0; local
392 u32 cfg; local
425 u32 cfg; local
507 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); local
522 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); local
531 u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE); local
559 u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); local
603 u32 bus_width, cfg = 0; local
655 u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST); local
675 u32 cfg, tmp; local
740 u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); local
747 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); local
757 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); local
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/linux-master/sound/pci/hda/
H A Dhda_auto_parser.h44 const struct auto_pin_cfg *cfg,
47 const struct auto_pin_cfg *cfg,
88 struct auto_pin_cfg *cfg,
93 #define snd_hda_parse_pin_def_config(codec, cfg, ignore) \
94 snd_hda_parse_pin_defcfg(codec, cfg, ignore, 0)
96 static inline int auto_cfg_hp_outs(const struct auto_pin_cfg *cfg) argument
98 return (cfg->line_out_type == AUTO_PIN_HP_OUT) ?
99 cfg->line_outs : cfg->hp_outs;
101 static inline const hda_nid_t *auto_cfg_hp_pins(const struct auto_pin_cfg *cfg) argument
106 auto_cfg_speaker_outs(const struct auto_pin_cfg *cfg) argument
111 auto_cfg_speaker_pins(const struct auto_pin_cfg *cfg) argument
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H A Dhda_auto_parser.c55 /* add the found input-pin to the cfg->inputs[] table */
56 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, argument
59 if (cfg->num_inputs < AUTO_CFG_MAX_INS) {
60 cfg->inputs[cfg->num_inputs].pin = nid;
61 cfg->inputs[cfg->num_inputs].type = type;
62 cfg->inputs[cfg->num_inputs].has_boost_on_pin =
64 cfg
168 snd_hda_parse_pin_defcfg(struct hda_codec *codec, struct auto_pin_cfg *cfg, const hda_nid_t *ignore_nids, unsigned int cond_flags) argument
532 check_mic_location_need(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) argument
569 hda_get_autocfg_input_label(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) argument
652 fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, const char *name, char *label, int maxlen, int *indexp) argument
708 snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, char *label, int maxlen, int *indexp) argument
807 snd_hda_apply_pincfgs(struct hda_codec *codec, const struct hda_pintbl *cfg) argument
815 set_pin_targets(struct hda_codec *codec, const struct hda_pintbl *cfg) argument
898 u32 cfg = pin->cfg; local
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/linux-master/drivers/pci/
H A Decam.c32 struct pci_config_window *cfg; local
40 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
41 if (!cfg)
48 cfg->parent = dev;
49 cfg->ops = ops;
50 cfg->busr.start = busr->start;
51 cfg->busr.end = busr->end;
52 cfg->busr.flags = IORESOURCE_BUS;
53 cfg
105 pci_ecam_free(struct pci_config_window *cfg) argument
128 struct pci_config_window *cfg = bus->sysdata; local
151 struct pci_config_window *cfg = bus->sysdata; local
170 struct pci_config_window *cfg = bus->sysdata; local
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/linux-master/arch/x86/pci/
H A Dmmconfig_64.c21 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); local
23 if (cfg && cfg->virt)
24 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
99 static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg) argument
105 start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
106 num_buses = cfg->end_bus - cfg->start_bus + 1;
110 addr -= PCI_MMCFG_BUS_OFFSET(cfg
114 pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg) argument
125 pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg) argument
135 struct pci_mmcfg_region *cfg; local
150 struct pci_mmcfg_region *cfg; local
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H A Dmmconfig-shared.c37 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) argument
39 if (cfg->res.parent)
40 release_resource(&cfg->res);
41 list_del(&cfg->list);
42 kfree(cfg);
47 struct pci_mmcfg_region *cfg, *tmp; local
50 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list)
51 pci_mmconfig_remove(cfg);
56 struct pci_mmcfg_region *cfg; local
59 list_for_each_entry_rcu(cfg,
120 struct pci_mmcfg_region *cfg; local
326 struct pci_mmcfg_region *cfg, *cfgx; local
470 is_mmconf_reserved(check_reserved_t is_reserved, struct pci_mmcfg_region *cfg, struct device *dev, const char *method) argument
516 pci_mmcfg_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int early) argument
568 struct pci_mmcfg_region *cfg; local
580 acpi_mcfg_valid_entry(struct acpi_table_mcfg *mcfg, struct acpi_mcfg_allocation *cfg) argument
601 struct acpi_mcfg_allocation *cfg_table, *cfg; local
649 struct pci_mmcfg_region *cfg; local
677 const struct pci_mmcfg_region *cfg; local
731 struct pci_mmcfg_region *cfg; local
769 struct pci_mmcfg_region *cfg; local
841 struct pci_mmcfg_region *cfg; local
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/linux-master/drivers/media/platform/samsung/s3c-camif/
H A Dcamif-regs.c18 u32 cfg; local
20 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT);
21 cfg |= CISRCFMT_ITU601_8BIT;
22 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg);
25 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL);
26 cfg |= CIGCTRL_SWRST;
28 cfg |= CIGCTRL_IRQ_LEVEL;
29 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg);
32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL);
33 cfg
40 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_CIGCTRL); local
51 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); local
70 unsigned int i, cfg; local
107 u32 cfg; local
133 u32 cfg; local
154 u32 cfg; local
171 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); local
221 u32 cfg; local
261 u32 cfg; local
291 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_MSCTRL(vp->id)); local
300 u32 cfg; local
348 u32 cfg = camif_read(vp->camif, local
365 u32 cfg, shfactor, addr; local
384 u32 cfg; local
431 u32 cfg; local
488 u32 cfg; local
501 u32 cfg; local
514 u32 cfg; local
537 u32 cfg; local
600 u32 cfg = readl(camif->io_base + registers[i].offset); local
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/linux-master/arch/arm/mach-davinci/
H A Dmux.c36 const struct mux_config *cfg; local
56 cfg = &soc_info->pinmux_pins[index];
58 if (cfg->name == NULL) {
64 if (cfg->mask) {
68 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
70 mask = (cfg->mask << cfg->mask_offset);
74 tmp2 = (cfg->mode << cfg->mask_offset);
80 __raw_writel(reg, pinmux_base + cfg
[all...]
/linux-master/tools/testing/selftests/bpf/prog_tests/
H A Dcore_extern.c25 const char *cfg; member in struct:test_case
32 .cfg = "CONFIG_BPF_SYSCALL=n\n"
54 { .name = "tristate (y)", .cfg = CFG"CONFIG_TRISTATE=y\n",
56 { .name = "tristate (n)", .cfg = CFG"CONFIG_TRISTATE=n\n",
58 { .name = "tristate (m)", .cfg = CFG"CONFIG_TRISTATE=m\n",
60 { .name = "tristate (int)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=1" },
61 { .name = "tristate (bad)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=M" },
63 { .name = "bool (y)", .cfg = CFG"CONFIG_BOOL=y\n",
65 { .name = "bool (n)", .cfg = CFG"CONFIG_BOOL=n\n",
67 { .name = "bool (tristate)", .fails = 1, .cfg
[all...]
/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dbtcoex.h13 int brcmf_btcoex_attach(struct brcmf_cfg80211_info *cfg);
14 void brcmf_btcoex_detach(struct brcmf_cfg80211_info *cfg);
/linux-master/include/linux/
H A Dnet_tstamp.h40 const struct hwtstamp_config *cfg)
42 kernel_cfg->flags = cfg->flags;
43 kernel_cfg->tx_type = cfg->tx_type;
44 kernel_cfg->rx_filter = cfg->rx_filter;
47 static inline void hwtstamp_config_from_kernel(struct hwtstamp_config *cfg, argument
50 cfg->flags = kernel_cfg->flags;
51 cfg->tx_type = kernel_cfg->tx_type;
52 cfg->rx_filter = kernel_cfg->rx_filter;
39 hwtstamp_config_to_kernel(struct kernel_hwtstamp_config *kernel_cfg, const struct hwtstamp_config *cfg) argument
/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drpm.c127 u64 cfg, last; local
132 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
133 last = cfg;
135 cfg |= RPM_TX_EN;
137 cfg &= ~(RPM_TX_EN);
139 if (cfg != last)
140 rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
147 u64 cfg; local
152 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
154 cfg |
165 u64 cfg; local
193 u64 cfg; local
211 u64 quanta_offset = 0, quanta_thresh = 0, cfg; local
289 u64 cfg; local
309 u64 cfg; local
331 u64 cfg; local
358 u64 cfg, pfc_class_mask_cfg; local
490 u64 cfg; local
555 u64 cfg; local
584 u64 cfg; local
614 u64 cfg, class_en, pfc_class_mask_cfg; local
659 u64 cfg; local
677 u64 cfg; local
731 u64 rx_logl_xon, cfg; local
[all...]
/linux-master/arch/arm/plat-orion/include/plat/
H A Daddr-map.h24 int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
28 void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
44 void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
47 void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
52 void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
/linux-master/drivers/gpu/drm/exynos/
H A Dexynos_drm_gsc.c66 #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
381 u32 cfg; local
385 cfg = (GSC_SW_RESET_SRESET);
386 gsc_write(cfg, GSC_SW_RESET);
390 cfg = gsc_read(GSC_SW_RESET);
391 if (!cfg)
396 if (cfg) {
402 cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK);
403 cfg |
422 u32 cfg; local
451 u32 cfg; local
524 u32 cfg; local
568 u32 cfg; local
611 u32 cfg; local
638 u32 cfg; local
747 u32 cfg; local
850 u32 cfg; local
868 u32 cfg; local
910 u32 cfg, i, buf_num = GSC_REG_SZ; local
928 u32 cfg; local
963 u32 cfg, curr_index, i; local
993 u32 cfg, curr_index, i; local
1085 u32 cfg; local
[all...]
/linux-master/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy.c13 struct hdmi_phy_cfg *cfg = phy->cfg; local
17 phy->regs = devm_kcalloc(dev, cfg->num_regs, sizeof(phy->regs[0]),
22 phy->clks = devm_kcalloc(dev, cfg->num_clks, sizeof(phy->clks[0]),
27 for (i = 0; i < cfg->num_regs; i++)
28 phy->regs[i].supply = cfg->reg_names[i];
30 ret = devm_regulator_bulk_get(dev, cfg->num_regs, phy->regs);
38 for (i = 0; i < cfg->num_clks; i++) {
41 clk = msm_clk_get(phy->pdev, cfg->clk_names[i]);
45 cfg
57 struct hdmi_phy_cfg *cfg = phy->cfg; local
81 struct hdmi_phy_cfg *cfg = phy->cfg; local
[all...]
/linux-master/arch/loongarch/pci/
H A Dacpi.c19 struct pci_config_window *cfg; member in struct:pci_root_info
31 struct pci_config_window *cfg = bridge->bus->sysdata; local
34 adev = to_acpi_device(cfg->parent);
37 set_dev_node(bus_dev, pa_to_nid(cfg->res.start));
44 struct pci_config_window *cfg = bus->sysdata; local
45 struct acpi_device *adev = to_acpi_device(cfg->parent);
56 pci_ecam_free(info->cfg);
99 struct pci_config_window *cfg; local
104 cfg = kzalloc(sizeof(*cfg), GFP_KERNE
163 struct pci_config_window *cfg; local
[all...]
/linux-master/drivers/ata/
H A Dahci_octeon.c35 u64 cfg; local
42 cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG);
44 cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT);
45 cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT);
48 cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
49 cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
51 cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
52 cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
55 cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT;
57 cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg);
[all...]
/linux-master/drivers/iommu/
H A Dio-pgtable.c38 struct io_pgtable_cfg *cfg)
41 if (!cfg->alloc && !cfg->free)
47 if (!cfg->alloc || !cfg->free)
58 struct io_pgtable_cfg *cfg,
67 if (check_custom_allocator(fmt, cfg))
74 iop = fns->alloc(cfg, cookie);
80 iop->cfg = *cfg;
37 check_custom_allocator(enum io_pgtable_fmt fmt, struct io_pgtable_cfg *cfg) argument
57 alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, struct io_pgtable_cfg *cfg, void *cookie) argument
[all...]
/linux-master/drivers/net/wireless/microchip/wilc1000/
H A Dwlan_cfg.c142 struct wilc_cfg *cfg = &wl->cfg; local
150 while (cfg->b[i].id != WID_NIL && cfg->b[i].id != wid)
153 if (cfg->b[i].id == wid)
154 cfg->b[i].val = info[4];
160 while (cfg->hw[i].id != WID_NIL && cfg->hw[i].id != wid)
163 if (cfg->hw[i].id == wid)
164 cfg
274 struct wilc_cfg *cfg = &wl->cfg; local
[all...]

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