1/* SPDX-License-Identifier: GPL-2.0 */
2/* Marvell Octeon EP (EndPoint) VF Ethernet Driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8#ifndef _OCTEP_VF_CONFIG_H_
9#define _OCTEP_VF_CONFIG_H_
10
11/* Tx instruction types by length */
12#define OCTEP_VF_32BYTE_INSTR  32
13#define OCTEP_VF_64BYTE_INSTR  64
14
15/* Tx Queue: maximum descriptors per ring */
16#define OCTEP_VF_IQ_MAX_DESCRIPTORS    1024
17/* Minimum input (Tx) requests to be enqueued to ring doorbell */
18#define OCTEP_VF_DB_MIN                8
19/* Packet threshold for Tx queue interrupt */
20#define OCTEP_VF_IQ_INTR_THRESHOLD     0x0
21
22/* Minimum watermark for backpressure */
23#define OCTEP_VF_OQ_WMARK_MIN 256
24
25/* Rx Queue: maximum descriptors per ring */
26#define OCTEP_VF_OQ_MAX_DESCRIPTORS   1024
27
28/* Rx buffer size: Use page size buffers.
29 * Build skb from allocated page buffer once the packet is received.
30 * When a gathered packet is received, make head page as skb head and
31 * page buffers in consecutive Rx descriptors as fragments.
32 */
33#define OCTEP_VF_OQ_BUF_SIZE          (SKB_WITH_OVERHEAD(PAGE_SIZE))
34#define OCTEP_VF_OQ_PKTS_PER_INTR     128
35#define OCTEP_VF_OQ_REFILL_THRESHOLD  (OCTEP_VF_OQ_MAX_DESCRIPTORS / 4)
36
37#define OCTEP_VF_OQ_INTR_PKT_THRESHOLD   1
38#define OCTEP_VF_OQ_INTR_TIME_THRESHOLD  10
39
40#define OCTEP_VF_MSIX_NAME_SIZE      (IFNAMSIZ + 32)
41
42/* Tx Queue wake threshold
43 * wakeup a stopped Tx queue if minimum 2 descriptors are available.
44 * Even a skb with fragments consume only one Tx queue descriptor entry.
45 */
46#define OCTEP_VF_WAKE_QUEUE_THRESHOLD 2
47
48/* Minimum MTU supported by Octeon network interface */
49#define OCTEP_VF_MIN_MTU        ETH_MIN_MTU
50/* Maximum MTU supported by Octeon interface*/
51#define OCTEP_VF_MAX_MTU        (10000 - (ETH_HLEN + ETH_FCS_LEN))
52/* Default MTU */
53#define OCTEP_VF_DEFAULT_MTU    1500
54
55/* Macros to get octeon config params */
56#define CFG_GET_IQ_CFG(cfg)             ((cfg)->iq)
57#define CFG_GET_IQ_NUM_DESC(cfg)        ((cfg)->iq.num_descs)
58#define CFG_GET_IQ_INSTR_TYPE(cfg)      ((cfg)->iq.instr_type)
59#define CFG_GET_IQ_INSTR_SIZE(cfg)      (64)
60#define CFG_GET_IQ_DB_MIN(cfg)          ((cfg)->iq.db_min)
61#define CFG_GET_IQ_INTR_THRESHOLD(cfg)  ((cfg)->iq.intr_threshold)
62
63#define CFG_GET_OQ_NUM_DESC(cfg)          ((cfg)->oq.num_descs)
64#define CFG_GET_OQ_BUF_SIZE(cfg)          ((cfg)->oq.buf_size)
65#define CFG_GET_OQ_REFILL_THRESHOLD(cfg)  ((cfg)->oq.refill_threshold)
66#define CFG_GET_OQ_INTR_PKT(cfg)          ((cfg)->oq.oq_intr_pkt)
67#define CFG_GET_OQ_INTR_TIME(cfg)         ((cfg)->oq.oq_intr_time)
68#define CFG_GET_OQ_WMARK(cfg)             ((cfg)->oq.wmark)
69
70#define CFG_GET_PORTS_ACTIVE_IO_RINGS(cfg) ((cfg)->ring_cfg.active_io_rings)
71#define CFG_GET_PORTS_MAX_IO_RINGS(cfg) ((cfg)->ring_cfg.max_io_rings)
72
73#define CFG_GET_CORE_TICS_PER_US(cfg)     ((cfg)->core_cfg.core_tics_per_us)
74#define CFG_GET_COPROC_TICS_PER_US(cfg)   ((cfg)->core_cfg.coproc_tics_per_us)
75
76#define CFG_GET_IOQ_MSIX(cfg)            ((cfg)->msix_cfg.ioq_msix)
77
78/* Hardware Tx Queue configuration. */
79struct octep_vf_iq_config {
80	/* Size of the Input queue (number of commands) */
81	u16 num_descs;
82
83	/* Command size - 32 or 64 bytes */
84	u16 instr_type;
85
86	/* Minimum number of commands pending to be posted to Octeon before driver
87	 * hits the Input queue doorbell.
88	 */
89	u16 db_min;
90
91	/* Trigger the IQ interrupt when processed cmd count reaches
92	 * this level.
93	 */
94	u32 intr_threshold;
95};
96
97/* Hardware Rx Queue configuration. */
98struct octep_vf_oq_config {
99	/* Size of Output queue (number of descriptors) */
100	u16 num_descs;
101
102	/* Size of buffer in this Output queue. */
103	u16 buf_size;
104
105	/* The number of buffers that were consumed during packet processing
106	 * by the driver on this Output queue before the driver attempts to
107	 * replenish the descriptor ring with new buffers.
108	 */
109	u16 refill_threshold;
110
111	/* Interrupt Coalescing (Packet Count). Octeon will interrupt the host
112	 * only if it sent as many packets as specified by this field.
113	 * The driver usually does not use packet count interrupt coalescing.
114	 */
115	u32 oq_intr_pkt;
116
117	/* Interrupt Coalescing (Time Interval). Octeon will interrupt the host
118	 * if at least one packet was sent in the time interval specified by
119	 * this field. The driver uses time interval interrupt coalescing by
120	 * default. The time is specified in microseconds.
121	 */
122	u32 oq_intr_time;
123
124	/* Water mark for backpressure.
125	 * Output queue sends backpressure signal to source when
126	 * free buffer count falls below wmark.
127	 */
128	u32 wmark;
129};
130
131/* Tx/Rx configuration */
132struct octep_vf_ring_config {
133	/* Max number of IOQs */
134	u16 max_io_rings;
135
136	/* Number of active IOQs */
137	u16 active_io_rings;
138};
139
140/* Octeon MSI-x config. */
141struct octep_vf_msix_config {
142	/* Number of IOQ interrupts */
143	u16 ioq_msix;
144};
145
146/* Data Structure to hold configuration limits and active config */
147struct octep_vf_config {
148	/* Input Queue attributes. */
149	struct octep_vf_iq_config iq;
150
151	/* Output Queue attributes. */
152	struct octep_vf_oq_config oq;
153
154	/* MSI-X interrupt config */
155	struct octep_vf_msix_config msix_cfg;
156
157	/* NIC VF ring Configuration */
158	struct octep_vf_ring_config ring_cfg;
159};
160#endif /* _OCTEP_VF_CONFIG_H_ */
161