/broadcom-cfe-1.4.2/cfe/api/ |
H A D | cfe_api.c | 111 cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1) argument 124 xiocb.plist.xiocb_cpuctl.a1_val = a1;
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H A D | cfe_api.h | 170 int cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1);
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/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/bcmsb/src/ |
H A D | sbmemc.S | 88 * a1: x x x sdr/ddr flag 126 and a1,v1,M_SBID_CR 127 srl a1,a1,S_SBID_CR 128 beq a1,K_CR_MEMC,read_nvram 131 bne a1,(M_SBID_CR >> S_SBID_CR),1b # XXX No bus error? 392 * Uses a1, t7, t8, t9 (here and by calling sb_core_reset) 400 li a1,0 402 li a1,MEMC_CONFIG_INIT 403 or a1,a [all...] |
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/ |
H A D | sbmips.h | 187 #define a1 $5 macro
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/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/src/ |
H A D | sb1250_memcpy.S | 125 #define src a1
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/broadcom-cfe-1.4.2/cfe/arch/mips/common/src/ |
H A D | apientry.S | 112 * a1 - pointer to IOCB to execute 157 lw t0,R_XIOCB_FCODE(a1) 159 lw t0,R_XIOCB_FLAGS(a1) 178 lw a0,R_XIOCB_XSTAT(a1) # Exit status 215 move a0,a1 # A0 points at IOCB 502 * a1,a2 - start/end of range for "range invalidate" operations
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H A D | dev_flash_all.S | 72 * a1 - flashbase - base (phys addr) of flash area 81 #define flashbase a1
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H A D | exception.S | 266 SR a1,(v0) 367 SREG a1,XGR_A1(k1) 420 move a1,k1 # Pass frame to exception handler 441 LREG a1,XGR_A1(k1)
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H A D | init_mips.S | 976 li a1,0 1024 * a1 - entry vector 1079 move a1,zero # A1 = 0
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H A D | init_ram.S | 389 li a1,0 416 * a1 - entry vector 468 move a1,zero # A1 = 0
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H A D | lib_hssubr.S | 105 sb a1,(a0) 114 sh a1,(a0) 123 sw a1,(a0) 133 sd a1,(a0) 163 lbu t0,0(a1) /* copying one byte at a time */ 166 ADDPTR a1,a1,1 193 sb a1,0(a0)
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H A D | lib_physio.S | 155 PHYSOP(sb,a1) 163 PHYSOP(sh,a1) 171 PHYSOP(sw,a1) 179 PHYSOP(sd,a1)
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H A D | lib_setjmp.S | 92 move v0,a1
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H A D | zipstart_entry.S | 127 SREG a1,XGR_A1(k1) 175 move a1,k1 # Pass frame to exception handler 190 LREG a1,XGR_A1(k1)
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H A D | zipstart_init.S | 493 li a1,0 544 * a1 - 594 move a1,zero
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/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/ |
H A D | bcm1480_altcpu.S | 628 * a1 - pointer to start parameters (four 64-bit values) 665 ld t2,R_CPUSTART_GPVAL(a1) 668 ld t2,R_CPUSTART_SPVAL(a1) 671 ld t2,R_CPUSTART_A1VAL(a1) 674 ld t2,R_CPUSTART_PCVAL(a1) /* this one actually starts the CPU */ 872 ld a1,R_CPU_ARG(t0) # Load user argument (A1)
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H A D | bcm1480_cpu.S | 281 move t0,a1 295 move t0,a1
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H A D | bcm1480_ircpoll.S | 369 * a1 SR bits to be set 384 or t0,t0,a1
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H A D | bcm1480_l1cache.S | 222 * a1 - length of buffer 232 sub a1,a1,L1CACHE_LINESIZE 233 bge a1,zero,1b 247 * a1 - length of buffer 257 sub a1,a1,L1CACHE_LINESIZE 258 bge a1,zero,1b
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H A D | sb1_cpuinit.S | 87 move a1,zero
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/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/include/ |
H A D | sbmips32.h | 137 #define a1 $5 macro
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/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/ |
H A D | bcmcore_cpuinit.S | 375 move t0,a1 389 move t0,a1
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H A D | bcmcore_ircpoll.S | 122 mfc0 a1, C0_SR 123 and a0, a0, a1 263 * a1 SR bits to be set 278 or t0,t0,a1
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H A D | bcmcore_l1cache.S | 414 * a1 - length 420 * a0, a1, t0, t1 425 beq a1,zero,2f 431 add a1,a0,a1 433 addi a1,a1,LINESIZE-1 434 and a1,a1,t0 447 bne a0,a1, [all...] |
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/ |
H A D | diag_l2cache.S | 548 #define R_BG_PAT0_1 a1 1277 #define R_ECC_PAT0_1 a1 1753 #define R_PAT0_1 a1
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