Searched refs:WR2 (Results 1 - 3 of 3) sorted by last modified time

/freebsd-11-stable/sys/dev/sdhci/
H A Dsdhci.c79 #define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val)) macro
328 WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN);
351 WR2(slot, BCM577XX_HOST_CONTROL, clk_sel);
390 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
393 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
409 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
1166 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1233 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1248 WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
1404 WR2(slo
[all...]
/freebsd-11-stable/sys/arm/freescale/imx/
H A Dimx_wdog.c94 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val) function
114 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE);
117 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1);
118 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2);
123 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE);
206 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG));
210 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */
/freebsd-11-stable/sys/dev/ffec/
H A Dif_ffec.c216 WR2(struct ffec_softc *sc, bus_size_t off, uint16_t val) function
292 WR2(sc, FEC_MIIGSK_ENR, 0);
296 WR2(sc, FEC_MIIGSK_CFGR, ifmode);
298 WR2(sc, FEC_MIIGSK_ENR, FEC_MIIGSK_ENR_EN);

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