Searched refs:UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK (Results 1 - 11 of 11) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h753 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h751 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x1 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h508 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_2_0_0_sh_mask.h3265 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_2_5_sh_mask.h2139 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_2_6_0_sh_mask.h3810 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_3_0_0_sh_mask.h2884 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_4_0_0_sh_mask.h3937 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_4_0_3_sh_mask.h3972 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
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H A Dvcn_4_0_5_sh_mask.h3803 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro
H A Dvcn_5_0_0_sh_mask.h3493 #define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L macro

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