Searched refs:UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK (Results 1 - 10 of 10) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h136 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x00000020L macro
H A Duvd_4_2_sh_mask.h695 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x20 macro
H A Duvd_5_0_sh_mask.h865 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x20 macro
H A Duvd_6_0_sh_mask.h855 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x20 macro
H A Duvd_3_1_sh_mask.h689 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x20 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_sh_mask.h4854 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x00000020L macro
H A Dvcn_4_0_0_sh_mask.h7408 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x00000020L macro
H A Dvcn_4_0_3_sh_mask.h10199 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK macro
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H A Dvcn_4_0_5_sh_mask.h7736 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x00000020L macro
H A Dvcn_5_0_0_sh_mask.h6902 #define UVD_CGC_MEM_CTRL__UDEC_CM_LS_EN_MASK 0x00000020L macro

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