Searched refs:UMC_BASE__INST1_SEG0 (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h778 #define UMC_BASE__INST1_SEG0 0 macro
H A Dvega20_ip_offset.h845 #define UMC_BASE__INST1_SEG0 0 macro
H A Dyellow_carp_offset.h1274 #define UMC_BASE__INST1_SEG0 0x00094000 macro
H A Drenoir_ip_offset.h1247 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Dvega10_ip_offset.h1089 #define UMC_BASE__INST1_SEG0 0 macro
H A Dsienna_cichlid_ip_offset.h1046 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Dbeige_goby_ip_offset.h1181 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Dnavi12_ip_offset.h997 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Dnavi14_ip_offset.h997 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Ddimgrey_cavefish_ip_offset.h956 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Daldebaran_ip_offset.h1402 #define UMC_BASE__INST1_SEG0 0x00094000 macro
H A Dvangogh_ip_offset.h1353 #define UMC_BASE__INST1_SEG0 0x00054000 macro
H A Darct_ip_offset.h1430 #define UMC_BASE__INST1_SEG0 0x000132E0 macro

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