Searched refs:UMC_BASE__INST0_SEG2 (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h773 #define UMC_BASE__INST0_SEG2 0 macro
H A Dvega20_ip_offset.h840 #define UMC_BASE__INST0_SEG2 0 macro
H A Dyellow_carp_offset.h1269 #define UMC_BASE__INST0_SEG2 0x02425800 macro
H A Drenoir_ip_offset.h1243 #define UMC_BASE__INST0_SEG2 0 macro
H A Dvega10_ip_offset.h1085 #define UMC_BASE__INST0_SEG2 0 macro
H A Dsienna_cichlid_ip_offset.h1042 #define UMC_BASE__INST0_SEG2 0 macro
H A Dbeige_goby_ip_offset.h1176 #define UMC_BASE__INST0_SEG2 0 macro
H A Dnavi12_ip_offset.h993 #define UMC_BASE__INST0_SEG2 0 macro
H A Dnavi14_ip_offset.h993 #define UMC_BASE__INST0_SEG2 0 macro
H A Ddimgrey_cavefish_ip_offset.h951 #define UMC_BASE__INST0_SEG2 0 macro
H A Daldebaran_ip_offset.h1397 #define UMC_BASE__INST0_SEG2 0x02425800 macro
H A Dvangogh_ip_offset.h1348 #define UMC_BASE__INST0_SEG2 0 macro
H A Darct_ip_offset.h1425 #define UMC_BASE__INST0_SEG2 0x00425800 macro

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