Searched refs:SQ_WAVE_TTMP5__DATA__SHIFT (Results 1 - 14 of 14) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10037 #define SQ_WAVE_TTMP5__DATA__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h12614 #define SQ_WAVE_TTMP5__DATA__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h14500 #define SQ_WAVE_TTMP5__DATA__SHIFT 0x0 macro
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H A Dgfx_8_1_sh_mask.h14898 #define SQ_WAVE_TTMP5__DATA__SHIFT 0x0 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h42960 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_10_3_0_sh_mask.h48186 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_11_0_0_sh_mask.h41604 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_11_0_3_sh_mask.h44646 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_11_5_0_sh_mask.h36536 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_9_0_sh_mask.h28600 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_9_1_sh_mask.h29810 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_9_2_1_sh_mask.h30138 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_9_4_2_sh_mask.h32866 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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H A Dgc_9_4_3_sh_mask.h31509 #define SQ_WAVE_TTMP5__DATA__SHIFT macro
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