Searched refs:SDMA0_BASE__INST1_SEG0 (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h677 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Dyellow_carp_offset.h1127 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Drenoir_ip_offset.h1121 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Dvega10_ip_offset.h999 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Dsienna_cichlid_ip_offset.h878 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Dbeige_goby_ip_offset.h1034 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Daldebaran_ip_offset.h1206 #define SDMA0_BASE__INST1_SEG0 0 macro
H A Darct_ip_offset.h923 #define SDMA0_BASE__INST1_SEG0 0 macro

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