Searched refs:RCS0 (Results 1 - 22 of 22) sorted by relevance

/linux-master/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c58 {RCS0, RING_MODE_GEN7(RENDER_RING_BASE), 0xffff, false}, /* 0x229c */
59 {RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
60 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
61 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
62 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
63 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
64 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
65 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
66 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
67 {RCS0, RING_FORCE_TO_NONPRI
[all...]
H A Dscheduler.c101 if (workload->engine->id != RCS0)
165 if (workload->engine->id == RCS0) {
218 if (IS_BROADWELL(gvt->gt->i915) && workload->engine->id == RCS0)
505 if (workload->engine->id == RCS0 &&
977 if (IS_BROADWELL(rq->i915) && rq->engine->id == RCS0)
1703 if (engine->id == RCS0) {
H A Dexeclist.c49 [RCS0] = RCS_AS_CONTEXT_SWITCH,
H A Dcmd_parser.c425 #define R_RCS BIT(RCS0)
597 [RCS0] = {
1051 if (IS_BROADWELL(s->engine->i915) && s->engine->id != RCS0) {
1152 [RCS0] = {
H A Dhandlers.c326 engine_mask |= BIT(RCS0);
2081 id = RCS0;
/linux-master/drivers/gpu/drm/i915/
H A Di915_pci.c93 .platform_engine_mask = BIT(RCS0), \
108 .platform_engine_mask = BIT(RCS0), \
140 .platform_engine_mask = BIT(RCS0), \
203 .platform_engine_mask = BIT(RCS0), \
231 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
239 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
245 .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
271 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
319 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
387 .platform_engine_mask = BIT(RCS0) | BI
[all...]
H A Di915_irq.c1022 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
1129 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
1254 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
H A Di915_drv.h652 ENGINE_INSTANCES_MASK(gt, RCS0, I915_MAX_RCS)
H A Di915_gpu_error.c1310 case RCS0:
/linux-master/drivers/gpu/drm/i915/selftests/
H A Dmock_gem_device.c233 to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0);
234 if (!to_gt(i915)->engine[RCS0])
237 if (mock_engine_init(to_gt(i915)->engine[RCS0]))
H A Di915_request.c218 ce = i915_gem_context_get_engine(ctx[0], RCS0);
236 ce = i915_gem_context_get_engine(ctx[1], RCS0);
/linux-master/drivers/gpu/drm/i915/gt/
H A Dselftest_gt_pm.c104 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
H A Dselftest_engine_cs.c151 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
279 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
H A Dintel_engine_user.c165 [RENDER_CLASS] = { RCS0, 1 },
H A Dintel_engine_types.h112 RCS0 = 0, enumerator in enum:intel_engine_id
H A Dintel_engine_cs.c64 [RCS0] = {
402 [RCS0] = GEN11_GRDOM_RENDER,
435 [RCS0] = GEN6_GRDOM_RENDER,
1731 [RCS0] = MSG_IDLE_CS,
1814 if (engine->id != RCS0)
1848 if (engine->id != RCS0)
1860 if (engine->id == RCS0)
H A Dintel_ring_submission.c93 case RCS0:
940 GEM_BUG_ON(engine->id != RCS0);
H A Dintel_mocs.c620 [RCS0] = __GEN9_RCS0_MOCS0,
H A Dgen8_engine_cs.c171 case RCS0:
H A Dintel_execlists_submission.c3506 [RCS0] = GEN8_RCS_IRQ_SHIFT,
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_execbuffer.c2227 if (GRAPHICS_VER(rq->i915) != 7 || rq->engine->id != RCS0) {
2474 [I915_EXEC_DEFAULT] = RCS0,
2475 [I915_EXEC_RENDER] = RCS0,
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_overlay.c1399 engine = to_gt(dev_priv)->engine[RCS0];

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