Searched refs:OTG_PIXEL_RATE_DIV (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dccg.h96 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK1, mask_sh),\
97 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK2, mask_sh),\
98 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK1, mask_sh),\
99 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK2, mask_sh),\
100 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK1, mask_sh),\
101 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK2, mask_sh),\
102 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK1, mask_sh),\
103 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK2, mask_sh),\
104 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK2, mask_sh),\
H A Ddcn32_dccg.c72 REG_GET_2(OTG_PIXEL_RATE_DIV,
77 REG_GET_2(OTG_PIXEL_RATE_DIV,
82 REG_GET_2(OTG_PIXEL_RATE_DIV,
87 REG_GET_2(OTG_PIXEL_RATE_DIV,
123 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
128 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
133 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
138 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
229 /* program OTG_PIXEL_RATE_DIV for DIVK1 and DIVK2 fields */
/linux-master/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h76 SR(OTG_PIXEL_RATE_DIV),\
127 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK1, mask_sh),\
128 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK2, mask_sh),\
129 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK1, mask_sh),\
130 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK2, mask_sh),\
131 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK1, mask_sh),\
132 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK2, mask_sh),\
133 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK1, mask_sh),\
134 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK2, mask_sh),\
135 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK
[all...]
H A Ddcn314_dccg.c72 REG_GET_2(OTG_PIXEL_RATE_DIV,
77 REG_GET_2(OTG_PIXEL_RATE_DIV,
82 REG_GET_2(OTG_PIXEL_RATE_DIV,
87 REG_GET_2(OTG_PIXEL_RATE_DIV,
122 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
127 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
132 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
137 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
229 /* program OTG_PIXEL_RATE_DIV for DIVK1 and DIVK2 fields */
/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_dccg.h118 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK1, mask_sh),\
119 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG0_PIXEL_RATE_DIVK2, mask_sh),\
120 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK1, mask_sh),\
121 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG1_PIXEL_RATE_DIVK2, mask_sh),\
122 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK1, mask_sh),\
123 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG2_PIXEL_RATE_DIVK2, mask_sh),\
124 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK1, mask_sh),\
125 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK2, mask_sh),\
126 DCCG_SF(OTG_PIXEL_RATE_DIV, OTG3_PIXEL_RATE_DIVK2, mask_sh),\
H A Ddcn35_dccg.c117 REG_GET_2(OTG_PIXEL_RATE_DIV,
122 REG_GET_2(OTG_PIXEL_RATE_DIV,
127 REG_GET_2(OTG_PIXEL_RATE_DIV,
132 REG_GET_2(OTG_PIXEL_RATE_DIV,
167 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
172 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
177 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
182 REG_UPDATE_2(OTG_PIXEL_RATE_DIV,
288 /* program OTG_PIXEL_RATE_DIV for DIVK1 and DIVK2 fields */
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h384 uint32_t OTG_PIXEL_RATE_DIV; member in struct:dccg_registers
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h1236 SR(OTG_PIXEL_RATE_DIV), SR(DTBCLK_P_CNTL), \

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