| /linux-master/arch/powerpc/perf/ |
| H A D | e6500-pmu.c | 39 [C(OP_WRITE)] = { 28, 223 },
45 [C(OP_WRITE)] = { -1, -1 },
56 [C(OP_WRITE)] = { 0, 0 },
68 [C(OP_WRITE)] = { -1, -1 },
74 [C(OP_WRITE)] = { -1, -1 },
80 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | e500-pmu.c | 41 [C(OP_WRITE)] = { 28, 0 },
46 [C(OP_WRITE)] = { -1, -1 },
57 [C(OP_WRITE)] = { 0, 0 },
68 [C(OP_WRITE)] = { -1, -1 },
73 [C(OP_WRITE)] = { -1, -1 },
78 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | generic-compat-pmu.c | 191 [ C(OP_WRITE) ] = {
205 [ C(OP_WRITE) ] = {
219 [ C(OP_WRITE) ] = {
233 [ C(OP_WRITE) ] = {
247 [ C(OP_WRITE) ] = {
261 [ C(OP_WRITE) ] = {
275 [ C(OP_WRITE) ] = {
|
| H A D | power10-pmu.c | 364 [C(OP_WRITE)] = {
378 [C(OP_WRITE)] = {
392 [C(OP_WRITE)] = {
406 [C(OP_WRITE)] = {
420 [C(OP_WRITE)] = {
434 [C(OP_WRITE)] = {
448 [C(OP_WRITE)] = {
465 [C(OP_WRITE)] = {
479 [C(OP_WRITE)] = {
493 [C(OP_WRITE)]
[all...] |
| H A D | power9-pmu.c | 343 [ C(OP_WRITE) ] = {
357 [ C(OP_WRITE) ] = {
371 [ C(OP_WRITE) ] = {
385 [ C(OP_WRITE) ] = {
399 [ C(OP_WRITE) ] = {
413 [ C(OP_WRITE) ] = {
427 [ C(OP_WRITE) ] = {
|
| H A D | power7-pmu.c | 342 [C(OP_WRITE)] = { 0, 0x300f0 },
347 [C(OP_WRITE)] = { -1, -1 },
352 [C(OP_WRITE)] = { 0x16082, 0x26082 },
357 [C(OP_WRITE)] = { -1, -1 },
362 [C(OP_WRITE)] = { -1, -1 },
367 [C(OP_WRITE)] = { -1, -1 },
372 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | power8-pmu.c | 272 [ C(OP_WRITE) ] = {
286 [ C(OP_WRITE) ] = {
300 [ C(OP_WRITE) ] = {
314 [ C(OP_WRITE) ] = {
328 [ C(OP_WRITE) ] = {
342 [ C(OP_WRITE) ] = {
356 [ C(OP_WRITE) ] = {
|
| H A D | ppc970-pmu.c | 441 [C(OP_WRITE)] = { 0x7810, 0x813 },
446 [C(OP_WRITE)] = { -1, -1 },
451 [C(OP_WRITE)] = { 0, 0 },
456 [C(OP_WRITE)] = { -1, -1 },
461 [C(OP_WRITE)] = { -1, -1 },
466 [C(OP_WRITE)] = { -1, -1 },
471 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | mpc7450-pmu.c | 368 [C(OP_WRITE)] = { 0, 0x227 },
373 [C(OP_WRITE)] = { -1, -1 },
378 [C(OP_WRITE)] = { 0, 0 },
383 [C(OP_WRITE)] = { -1, -1 },
388 [C(OP_WRITE)] = { -1, -1 },
393 [C(OP_WRITE)] = { -1, -1 },
398 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | power5-pmu.c | 570 [C(OP_WRITE)] = { 0x3c1090, 0xc10c3 },
575 [C(OP_WRITE)] = { -1, -1 },
580 [C(OP_WRITE)] = { 0, 0 },
585 [C(OP_WRITE)] = { -1, -1 },
590 [C(OP_WRITE)] = { -1, -1 },
595 [C(OP_WRITE)] = { -1, -1 },
600 [C(OP_WRITE)] = { -1, -1 },
|
| H A D | power6-pmu.c | 502 [C(OP_WRITE)] = { 0x180032, 0x80088 },
507 [C(OP_WRITE)] = { -1, -1 },
512 [C(OP_WRITE)] = { 0x250432, 0x150432 },
517 [C(OP_WRITE)] = { -1, -1 },
522 [C(OP_WRITE)] = { -1, -1 },
527 [C(OP_WRITE)] = { -1, -1 },
532 [C(OP_WRITE)] = { -1, -1 },
|
| /linux-master/arch/arm/kernel/ |
| H A D | perf_event_v7.c | 181 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
182 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
189 [C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
190 [C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
193 [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
196 [C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
200 [C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
201 [C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
231 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
232 [C(L1D)][C(OP_WRITE)][
[all...] |
| H A D | perf_event_v6.c | 98 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS,
99 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS,
110 [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS,
113 [C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS,
|
| /linux-master/arch/x86/events/zhaoxin/ |
| H A D | core.c | 56 [C(OP_WRITE)] = {
70 [C(OP_WRITE)] = {
84 [C(OP_WRITE)] = {
98 [C(OP_WRITE)] = {
112 [C(OP_WRITE)] = {
126 [C(OP_WRITE)] = {
140 [C(OP_WRITE)] = {
160 [C(OP_WRITE)] = {
174 [C(OP_WRITE)] = {
188 [C(OP_WRITE)]
[all...] |
| /linux-master/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 96 [ C(OP_WRITE) ] = {
111 [ C(OP_WRITE) ] = {
126 [ C(OP_WRITE) ] = {
141 [ C(OP_WRITE) ] = {
156 [ C(OP_WRITE) ] = {
171 [ C(OP_WRITE) ] = {
186 [ C(OP_WRITE) ] = {
|
| /linux-master/arch/sh/kernel/cpu/sh4a/ |
| H A D | perf_event.c | 121 [ C(OP_WRITE) ] = {
136 [ C(OP_WRITE) ] = {
151 [ C(OP_WRITE) ] = {
166 [ C(OP_WRITE) ] = {
181 [ C(OP_WRITE) ] = {
196 [ C(OP_WRITE) ] = {
211 [ C(OP_WRITE) ] = {
|
| /linux-master/drivers/net/dsa/sja1105/ |
| H A D | sja1105_dynamic_config.c | 69 * OP_WRITE: Set if the manual marks the ENTRY portion of the dynamic
876 #define OP_WRITE BIT(1) macro
886 .access = OP_WRITE,
894 .access = (OP_READ | OP_WRITE | OP_DEL),
902 .access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),
910 .access = (OP_WRITE | OP_DEL),
919 .access = OP_WRITE,
927 .access = OP_WRITE,
935 .access = OP_WRITE,
943 .access = OP_WRITE,
[all...] |
| /linux-master/arch/x86/events/intel/ |
| H A D | knc.c | 36 [ C(OP_WRITE) ] = {
50 [ C(OP_WRITE) ] = {
64 [ C(OP_WRITE) ] = {
80 [ C(OP_WRITE) ] = {
94 [ C(OP_WRITE) ] = {
108 [ C(OP_WRITE) ] = {
|
| H A D | p6.c | 33 [ C(OP_WRITE) ] = {
47 [ C(OP_WRITE) ] = {
61 [ C(OP_WRITE) ] = {
75 [ C(OP_WRITE) ] = {
89 [ C(OP_WRITE) ] = {
103 [ C(OP_WRITE) ] = {
|
| H A D | core.c | 496 [ C(OP_WRITE) ] = {
504 [ C(OP_WRITE) ] = {
514 [ C(OP_WRITE) ] = {
524 [ C(OP_WRITE) ] = {
534 [ C(OP_WRITE) ] = {
548 [ C(OP_WRITE) ] = {
575 [ C(OP_WRITE) ] = {
642 [ C(OP_WRITE) ] = {
656 [ C(OP_WRITE) ] = {
670 [ C(OP_WRITE) ]
[all...] |
| /linux-master/drivers/perf/ |
| H A D | riscv_pmu_sbi.c | 156 [C(OP_WRITE)] = {
158 C(OP_WRITE), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
160 C(OP_WRITE), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
176 [C(OP_WRITE)] = {
178 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
180 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
196 [C(OP_WRITE)] = {
198 C(OP_WRITE), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
200 C(OP_WRITE), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
216 [C(OP_WRITE)]
[all...] |
| H A D | arm_pmuv3.c | 89 [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
99 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
100 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR,
103 [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
106 [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
115 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
125 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
126 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_MISS_ST,
135 [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
136 [C(DTLB)][C(OP_WRITE)][
[all...] |
| /linux-master/arch/mips/kernel/ |
| H A D | perf_event_mipsxx.c | 1021 [C(OP_WRITE)] = {
1031 [C(OP_WRITE)] = {
1048 [C(OP_WRITE)] = {
1058 [C(OP_WRITE)] = {
1068 [C(OP_WRITE)] = {
1079 [C(OP_WRITE)] = {
1102 [C(OP_WRITE)] = {
1112 [C(OP_WRITE)] = {
1129 [C(OP_WRITE)] = {
1144 [C(OP_WRITE)]
[all...] |
| /linux-master/arch/sparc/kernel/ |
| H A D | perf_event.c | 226 [C(OP_WRITE)] = {
240 [ C(OP_WRITE) ] = {
254 [C(OP_WRITE)] = {
268 [ C(OP_WRITE) ] = {
282 [ C(OP_WRITE) ] = {
296 [ C(OP_WRITE) ] = {
310 [ C(OP_WRITE) ] = {
364 [C(OP_WRITE)] = {
378 [ C(OP_WRITE) ] = {
392 [C(OP_WRITE)]
[all...] |
| /linux-master/arch/x86/events/amd/ |
| H A D | core.c | 36 [ C(OP_WRITE) ] = {
50 [ C(OP_WRITE) ] = {
64 [ C(OP_WRITE) ] = {
78 [ C(OP_WRITE) ] = {
92 [ C(OP_WRITE) ] = {
106 [ C(OP_WRITE) ] = {
120 [ C(OP_WRITE) ] = {
140 [C(OP_WRITE)] = {
154 [C(OP_WRITE)] = {
168 [C(OP_WRITE)]
[all...] |