Searched refs:MAX_PHASE (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/usb/host/
H A Duhci-hcd.h95 #define MAX_PHASE 32 /* Periodic scheduling length */ macro
445 short load[MAX_PHASE]; /* Periodic allocations */
H A Duhci-q.c614 for (phase += period; phase < MAX_PHASE; phase += period)
633 int max_phase = min_t(int, MAX_PHASE, qh->period);
665 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
670 uhci->total_load / MAX_PHASE;
698 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
703 uhci->total_load / MAX_PHASE;
1102 qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
H A Duhci-debug.c399 for (i = 0; i < MAX_PHASE; ++i) {
/linux-master/drivers/staging/rts5208/
H A Dsd.h215 #define MAX_PHASE 31 macro
H A Dsd.c1616 struct timing_phase_path path[MAX_PHASE + 1];
1634 for (i = 0; i < MAX_PHASE + 1; i++) {
1668 path[cont_path_cnt - 1].end == MAX_PHASE) {
1669 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;
1673 path[0].mid += MAX_PHASE + 1;
1706 MAX_PHASE + 1);
1719 MAX_PHASE + 1);
1755 for (j = MAX_PHASE; j >= 0; j--) {
1799 for (i = MAX_PHASE; i >= 0; i--) {
1865 for (j = MAX_PHASE;
[all...]
/linux-master/drivers/mmc/host/
H A Drtsx_usb_sdmmc.c608 idx &= MAX_PHASE;
616 for (i = 0; i < MAX_PHASE + 1; i++) {
620 return MAX_PHASE + 1;
634 while (start < MAX_PHASE + 1) {
643 final_phase = (start_final + len_final / 2) & MAX_PHASE;
692 for (i = MAX_PHASE; i >= 0; i--) {
/linux-master/include/linux/
H A Drtsx_usb.h32 #define MAX_PHASE 15 macro

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