| /linux-master/arch/powerpc/perf/ |
| H A D | e6500-pmu.c | 42 [C(L1I)] = {
|
| H A D | e500-pmu.c | 44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | generic-compat-pmu.c | 200 [ C(L1I) ] = {
|
| H A D | power10-pmu.c | 373 [C(L1I)] = {
474 [C(L1I)] = {
|
| H A D | power9-pmu.c | 352 [ C(L1I) ] = {
|
| H A D | power7-pmu.c | 345 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power8-pmu.c | 281 [ C(L1I) ] = {
|
| H A D | ppc970-pmu.c | 444 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | mpc7450-pmu.c | 371 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power5-pmu.c | 573 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power6-pmu.c | 505 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| /linux-master/arch/alpha/kernel/ |
| H A D | setup.c | 1196 int L1I, L1D, L2, L3; local
1203 L1I = CSHAPE(8*1024, 5, 1);
1205 L1I = CSHAPE(16*1024, 5, 1);
1206 L1D = L1I;
1227 L1I = L1D = CSHAPE(8*1024, 5, 1);
1242 L1I = L1D = CSHAPE(8*1024, 5, 1);
1267 L1I = CSHAPE(16*1024, 6, 1);
1270 L1I = CSHAPE(32*1024, 6, 2);
1294 L1I = L1D = CSHAPE(64*1024, 6, 2);
1301 L1I
[all...] |
| /linux-master/arch/arm/kernel/ |
| H A D | perf_event_v7.c | 184 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
185 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
234 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
273 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
274 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
279 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
280 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
323 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
324 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
372 [C(L1I)][
[all...] |
| H A D | perf_event_v6.c | 101 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS,
|
| /linux-master/drivers/perf/ |
| H A D | riscv_pmu_sbi.c | 174 [C(L1I)] = {
177 C(OP_READ), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
179 C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
183 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
185 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
189 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
191 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
|
| H A D | arm_pmuv3.c | 65 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE,
66 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL,
130 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS,
131 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
|
| /linux-master/arch/mips/kernel/ |
| H A D | perf_event_mipsxx.c | 1026 [C(L1I)] = {
1107 [C(L1I)] = {
1176 [C(L1I)] = {
1220 [C(L1I)] = {
1276 [C(L1I)] = {
1340 [C(L1I)] = {
1393 [C(L1I)] = {
1444 [C(L1I)] = {
|
| /linux-master/arch/x86/events/zhaoxin/ |
| H A D | core.c | 65 [C(L1I)] = {
169 [C(L1I)] = {
|
| /linux-master/arch/x86/events/intel/ |
| H A D | knc.c | 45 [ C(L1I ) ] = {
|
| H A D | p6.c | 42 [ C(L1I ) ] = {
|
| H A D | core.c | 500 [ C(L1I ) ] = {
651 [ C(L1I ) ] = {
879 [ C(L1I ) ] = {
1035 [ C(L1I ) ] = {
1187 [ C(L1I ) ] = {
1189 [ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */
1190 [ C(RESULT_MISS) ] = 0x0280, /* L1I.MISSES */
1370 [ C(L1I ) ] = {
1372 [ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */
1373 [ C(RESULT_MISS) ] = 0x0280, /* L1I
[all...] |
| /linux-master/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 106 [ C(L1I) ] = {
|
| /linux-master/arch/sh/kernel/cpu/sh4a/ |
| H A D | perf_event.c | 131 [ C(L1I) ] = {
|
| /linux-master/arch/xtensa/kernel/ |
| H A D | perf_event.c | 93 [C(L1I)] = {
|
| /linux-master/arch/sparc/kernel/ |
| H A D | perf_event.c | 235 [C(L1I)] = {
373 [C(L1I)] = {
508 [C(L1I)] = {
645 [C(L1I)] = {
|