Searched refs:L1 (Results 1 - 25 of 92) sorted by last modified time

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/freebsd-11-stable/lib/msun/src/
H A De_powf.c36 L1 = 6.0000002384e-01, /* 0x3f19999a */ variable
180 r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/builtins/riscv/
H A Dint_mul_impl.inc22 .L1:
29 bnez a1, .L1
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/
H A DRawCommentList.cpp70 SourceLocation L1 = R1.getBeginLoc(); local
73 unsigned C1 = SM.getPresumedColumnNumber(L1, &Invalid);
/freebsd-11-stable/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_settings.cpp3627 if (!__kmp_strcasecmp_with_sentinel("L1", ptr, ',')) {
4488 } else if (*(pos + 1) == '1') { // L1 - Core
4513 } else if (*d == '1') { // L1 - Core
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp6492 Instruction *L1;
6504 } else if (match(Cond, m_Cmp(Pred, m_Instruction(L1), m_Specific(RHS)))) {
6506 !L1->isIdenticalTo(cast<Instruction>(LHS)))
6511 if (!match(Cond, m_Cmp(Pred, m_Instruction(L1), m_Instruction(L2))) ||
6512 !L1->isIdenticalTo(cast<Instruction>(LHS)) ||
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopFuse.cpp871 bool accessDiffIsPositive(const Loop &L0, const Loop &L1, Instruction &I0, argument
879 const SCEV *SCEVPtr1 = SE.getSCEVAtScope(Ptr1, &L1);
885 AddRecLoopReplacer Rewriter(SE, L0, L1);
923 /// @p L1) allow loop fusion of @p L0 and @p L1. The dependence analyses
1224 // The pre-header of L1 is not necessary anymore.
1318 // Delete the now empty loop L1.
1476 // The pre-header of L1 is not necessary anymore.
1581 // Delete the now empty loop L1.
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp1446 Value *L0, *L1, *R0, *R1; local
1448 if (match(LHS, m_ShuffleVector(m_Value(L0), m_Value(L1), m_Constant(Mask))) &&
1461 Value *NewBO1 = Builder.CreateBinOp(Opcode, L1, R1);
H A DInstCombineLoadStoreAlloca.cpp543 Instruction *L1; local
547 if (!match(V, m_Select(m_Cmp(Pred, m_Instruction(L1), m_Instruction(L2)),
550 LoadTy = L1->getType();
551 return (match(L1, m_Load(m_Specific(LHS))) &&
553 (match(L1, m_Load(m_Specific(RHS))) &&
H A DInstCombineAndOrXor.cpp327 Value *L1 = LHS->getOperand(0);
331 if (decomposeBitTestICmp(L1, L2, PredL, L11, L12, L2)) {
332 L21 = L22 = L1 = nullptr;
335 if (!match(L1, m_And(m_Value(L11), m_Value(L12)))) {
338 L11 = L1;
339 L12 = Constant::getAllOnesValue(L1->getType());
426 C = L1;
429 C = L1;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp79 Value *L0, *L1, *R0, *R1;
85 m_c_Or(m_Shl(m_Value(L0), m_Value(L1)), m_LShr(m_Value(R0), Sub)));
86 if (RotL.match(V) && L0 == R0 && L1 == R1) {
88 Y = L1;
94 m_c_Or(m_LShr(m_Value(L0), m_Value(L1)), m_Shl(m_Value(R0), Sub)));
95 if (RotR.match(V) && L0 == R0 && L1 == R1) {
97 Y = L1;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2752 SDValue L1 = expandV4F32ToV2F64(DAG, 2, DL, CmpOp1, Chain);
2756 SDValue LRes = DAG.getNode(Opcode, DL, VTs, Chain, L0, L1);
2759 H1.getValue(1), L1.getValue(1),
2766 SDValue LRes = DAG.getNode(Opcode, DL, MVT::v2i64, L0, L1);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1026 .Case("l0", SP::L0).Case("l1", SP::L1).Case("l2", SP::L2).Case("l3", SP::L3)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp65 SP::L0, SP::L1, SP::L2, SP::L3,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp133 Sparc::L0, Sparc::L1, Sparc::L2, Sparc::L3,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp280 // Is the access size is longer than the L1 cache line, skip the check.
286 MachineInstr &L1 = *S1.getInstr(); local
287 if (!L1.mayLoad() || L1.mayStore() ||
288 HII.getAddrMode(L1) != HexagonII::BaseImmOffset)
292 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1);
H A DHexagonISelDAGToDAGHVX.cpp1425 SDValue L1 = Lower.LowerOperation(B1, DAG);
1430 LV = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResTy, {L0, L1});
H A DHexagonISelDAGToDAG.cpp2152 WeightedLeaf L1 = Leaves.findMULbyConst(); local
2153 if (!L1.Value.getNode())
2154 L1 = Leaves.pop();
2156 assert(L0.Weight <= L1.Weight && "Priority queue is broken!");
2160 SDValue V1 = L1.Value;
2161 int V1Weight = L1.Weight;
H A DHexagonExpandCondsets.cpp1136 LiveInterval &L1 = LIS->getInterval(R1.Reg);
1140 if (L1.hasSubRanges() || L2.hasSubRanges())
1142 bool Overlap = L1.overlaps(L2);
1146 << printReg(R1.Reg, TRI, R1.Sub) << " " << L1 << "\n "
1156 if (!isIntraBlocks(L1) && !isIntraBlocks(L2))
1161 // Move all live segments from L2 to L1.
1168 NewVN = L1.getNextValue(I->valno->def, LIS->getVNInfoAllocator());
1173 L1.addSegment(LiveRange::Segment(I->start, I->end, NewVN));
1180 LLVM_DEBUG(dbgs() << "coalesced: " << L1 << "\n");
1181 L1
[all...]
H A DHexagonConstPropagation.cpp1374 const LatticeCell &L1 = Inputs.get(R2.Reg); local
1380 if (L1.isBottom())
1441 const LatticeCell &L1 = Inputs.get(R2.Reg); local
1447 if (L1.isBottom())
H A DHexagonBitSimplify.cpp1886 RegHalf L1, H1, L2, H2;
1888 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1))
1893 // Rs = H1.L1, Rt = H2.L2
1894 if (H1.Reg != L1.Reg || H1.Sub != L1.Sub || H1.Low || !L1.Low)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveDebugVariables.cpp214 static UserValue *merge(UserValue *L1, UserValue *L2) { argument
216 if (!L1)
218 L1 = L1->getLeader();
219 if (L1 == L2)
220 return L1;
221 // Splice L2 before L1's members.
224 End->leader = L1;
227 End->leader = L1;
228 End->next = L1
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolution.cpp9197 for (auto *L1 : LoopsUsed)
9199 assert((DT.dominates(L1->getHeader(), L2->getHeader()) ||
9200 DT.dominates(L2->getHeader(), L1->getHeader())) &&
9206 [&](const Loop *L1, const Loop *L2) {
9207 return DT.properlyDominates(L1->getHeader(), L2->getHeader());
10151 const SCEV *L1 = getSCEV(LPhi->getIncomingValueForBlock(Predecessor));
10152 if (!ProvedEasily(L1, RAR->getStart()))
H A DLoopCacheAnalysis.cpp68 [](const Loop *L1, const Loop *L2) {
69 return L1->getLoopDepth() < L2->getLoopDepth();
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/scudo/standalone/
H A Dsize_class_map.h72 const uptr L1 = L - MidSizeLog; local
73 return MidClass + (L1 << S) + HBits + (LBits > 0);
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerMerge.cpp58 std::istringstream L1(Line);
60 L1 >> NumFiles;

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