Searched refs:Interlace (Results 1 - 20 of 20) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h482 bool Interlace,
618 bool Interlace[],
1014 bool Interlace[],
H A Ddisplay_mode_vba_32.c437 v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k];
696 v->MaxVStartupLines[k] = ((mode_lib->vba.Interlace[k] &&
774 v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k];
1439 isInterlaceTiming = (mode_lib->vba.Interlace[k] &&
1533 mode_lib->vba.Interlace,
1597 mode_lib->vba.Interlace,
2357 == dm_420 && mode_lib->vba.Interlace[k] == 1 &&
2730 v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k];
2962 mode_lib->vba.MaximumVStartup[i][j][k] = ((mode_lib->vba.Interlace[k] &&
3083 mode_lib->vba.Interlace,
[all...]
H A Ddisplay_mode_vba_util_32.c2535 bool Interlace,
2566 *VInitPreFill = dml_floor((VRatio + (double) VTaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2950 bool Interlace[],
3097 Interlace[k],
5609 bool Interlace[],
5863 bool isInterlaceTiming = Interlace[k] && !ProgressiveToInterlaceUnitInOPP;
2532 dml32_CalculatePrefetchSourceLines( double VRatio, unsigned int VTaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, enum dm_rotation_angle SourceRotation, bool ViewportStationary, double SwathWidth, unsigned int ViewportHeight, unsigned int ViewportXStart, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
2921 dml32_UseMinimumDCFCLK( enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange[], bool DRRDisplay[], bool SynchronizeDRRDisplaysForUCLKPStateChangeFinal, unsigned int MaxInterDCNTileRepeaters, unsigned int MaxPrefetchMode, double DRAMClockChangeLatencyFinal, double FCLKChangeLatency, double SREnterPlusExitTime, unsigned int ReturnBusWidth, unsigned int RoundTripPingLatencyCycles, unsigned int ReorderingBytes, unsigned int PixelChunkSizeInKByte, unsigned int MetaChunkSize, bool GPUVMEnable, unsigned int GPUVMMaxPageTableLevels, bool HostVMEnable, unsigned int NumberOfActiveSurfaces, double HostVMMinPageSize, unsigned int HostVMMaxNonCachedPageTableLevels, bool DynamicMetadataVMEnabled, bool ImmediateFlipRequirement, bool ProgressiveToInterlaceUnitInOPP, double MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation, double PercentOfIdealSDPPortBWReceivedAfterUrgLatency, unsigned int VTotal[], unsigned int VActive[], unsigned int DynamicMetadataTransmittedBytes[], unsigned int DynamicMetadataLinesBeforeActiveRequired[], bool Interlace[], double RequiredDPPCLKPerSurface[][2][DC__NUM_DPP__MAX], double RequiredDISPCLK[][2], double UrgLatency[], unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX], double ProjectedDCFClkDeepSleep[][2], double MaximumVStartup[][2][DC__NUM_DPP__MAX], unsigned int TotalNumberOfActiveDPP[][2], unsigned int TotalNumberOfDCCActiveDPP[][2], unsigned int dpte_group_bytes[], double PrefetchLinesY[][2][DC__NUM_DPP__MAX], double PrefetchLinesC[][2][DC__NUM_DPP__MAX], unsigned int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX], unsigned int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX], unsigned int BytePerPixelY[], unsigned int BytePerPixelC[], unsigned int HTotal[], double PixelClock[], double PDEAndMetaPTEBytesPerFrame[][2][DC__NUM_DPP__MAX], double DPTEBytesPerRow[][2][DC__NUM_DPP__MAX], double MetaRowBytes[][2][DC__NUM_DPP__MAX], bool DynamicMetadataEnable[], double ReadBandwidthLuma[], double ReadBandwidthChroma[], double DCFCLKPerState[], double DCFCLKState[][2]) argument
5588 dml32_CalculateStutterEfficiency( unsigned int CompressedBufferSizeInkByte, enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange[], bool UnboundedRequestEnabled, unsigned int MetaFIFOSizeInKEntries, unsigned int ZeroSizeBufferEntries, unsigned int PixelChunkSizeInKByte, unsigned int NumberOfActiveSurfaces, unsigned int ROBBufferSizeInKByte, double TotalDataReadBandwidth, double DCFCLK, double ReturnBW, unsigned int CompbufReservedSpace64B, unsigned int CompbufReservedSpaceZs, double SRExitTime, double SRExitZ8Time, bool SynchronizeTimingsFinal, unsigned int BlendingAndTiming[], double StutterEnterPlusExitWatermark, double Z8StutterEnterPlusExitWatermark, bool ProgressiveToInterlaceUnitInOPP, bool Interlace[], double MinTTUVBlank[], unsigned int DPPPerSurface[], unsigned int DETBufferSizeY[], unsigned int BytePerPixelY[], double BytePerPixelDETY[], double SwathWidthY[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], double NetDCCRateLuma[], double NetDCCRateChroma[], double DCCFractionOfZeroSizeRequestsLuma[], double DCCFractionOfZeroSizeRequestsChroma[], unsigned int HTotal[], unsigned int VTotal[], double PixelClock[], double VRatio[], enum dm_rotation_angle SourceRotation[], unsigned int BlockHeight256BytesY[], unsigned int BlockWidth256BytesY[], unsigned int BlockHeight256BytesC[], unsigned int BlockWidth256BytesC[], unsigned int DCCYMaxUncompressedBlock[], unsigned int DCCCMaxUncompressedBlock[], unsigned int VActive[], bool DCCEnable[], bool WritebackEnable[], double ReadBandwidthSurfaceLuma[], double ReadBandwidthSurfaceChroma[], double meta_row_bw[], double dpte_row_bw[], double *StutterEfficiencyNotIncludingVBlank, double *StutterEfficiency, unsigned int *NumberOfStutterBurstsPerFrame, double *Z8StutterEfficiencyNotIncludingVBlank, double *Z8StutterEfficiency, unsigned int *Z8NumberOfStutterBurstsPerFrame, double *StutterPeriod, bool *DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE) argument
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c204 bool Interlace,
505 bool Interlace[],
676 bool Interlace,
1759 bool Interlace,
1772 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2388 v->Interlace[k],
2445 v->Interlace[k],
2582 v->Interlace[k],
2641 myPipe.InterlaceEnable = v->Interlace[k];
3183 isInterlaceTiming = (v->Interlace[
1755 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
6404 CalculateStutterEfficiency( struct display_mode_lib *mode_lib, int CompressedBufferSizeInkByte, bool UnboundedRequestEnabled, int ConfigReturnBufferSizeInKByte, int MetaFIFOSizeInKEntries, int ZeroSizeBufferEntries, int NumberOfActivePlanes, int ROBBufferSizeInKByte, double TotalDataReadBandwidth, double DCFCLK, double ReturnBW, double COMPBUF_RESERVED_SPACE_64B, double COMPBUF_RESERVED_SPACE_ZS, double SRExitTime, double SRExitZ8Time, bool SynchronizedVBlank, double Z8StutterEnterPlusExitWatermark, double StutterEnterPlusExitWatermark, bool ProgressiveToInterlaceUnitInOPP, bool Interlace[], double MinTTUVBlank[], int DPPPerPlane[], unsigned int DETBufferSizeY[], int BytePerPixelY[], double BytePerPixelDETY[], double SwathWidthY[], int SwathHeightY[], int SwathHeightC[], double NetDCCRateLuma[], double NetDCCRateChroma[], double DCCFractionOfZeroSizeRequestsLuma[], double DCCFractionOfZeroSizeRequestsChroma[], int HTotal[], int VTotal[], double PixelClock[], double VRatio[], enum scan_direction_class SourceScan[], int BlockHeight256BytesY[], int BlockWidth256BytesY[], int BlockHeight256BytesC[], int BlockWidth256BytesC[], int DCCYMaxUncompressedBlock[], int DCCCMaxUncompressedBlock[], int VActive[], bool DCCEnable[], bool WritebackEnable[], double ReadBandwidthPlaneLuma[], double ReadBandwidthPlaneChroma[], double meta_row_bw[], double dpte_row_bw[], double *StutterEfficiencyNotIncludingVBlank, double *StutterEfficiency, int *NumberOfStutterBurstsPerFrame, double *Z8StutterEfficiencyNotIncludingVBlank, double *Z8StutterEfficiency, int *Z8NumberOfStutterBurstsPerFrame, double *StutterPeriod) argument
7331 CalculateMaxVStartup( unsigned int VTotal, unsigned int VActive, unsigned int VBlankNom, unsigned int HTotal, double PixelClock, bool ProgressiveTointerlaceUnitinOPP, bool Interlace, unsigned int VBlankNomDefaultUS, double WritebackDelayTime) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c85 bool Interlace,
150 bool Interlace,
492 bool Interlace,
529 if (OutputFormat == dm_420 || (Interlace && ProgressiveToInterlaceUnitInOPP))
876 bool Interlace,
888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1933 mode_lib->vba.Interlace[k],
1975 mode_lib->vba.Interlace[k],
2132 mode_lib->vba.SwathWidthSingleDPPY[k], mode_lib->vba.BytePerPixelDETY[k], mode_lib->vba.BytePerPixelDETC[k], mode_lib->vba.SwathHeightY[k], mode_lib->vba.SwathHeightC[k], mode_lib->vba.Interlace[k],
2177 mode_lib->vba.Interlace[
463 CalculateDelayAfterScaler( struct display_mode_lib *mode_lib, double ReturnBW, double ReadBandwidthPlaneLuma, double ReadBandwidthPlaneChroma, double TotalDataReadBandwidth, double DisplayPipeLineDeliveryTimeLuma, double DisplayPipeLineDeliveryTimeChroma, double DPPCLK, double DISPCLK, double PixelClock, unsigned int DSCDelay, unsigned int DPPPerPlane, bool ScalerEnabled, unsigned int NumberOfCursors, double DPPCLKDelaySubtotal, double DPPCLKDelaySCL, double DPPCLKDelaySCLLBOnly, double DPPCLKDelayCNVCFormater, double DPPCLKDelayCNVCCursor, double DISPCLKDelaySubtotal, unsigned int ScalerRecoutWidth, enum output_format_class OutputFormat, unsigned int HTotal, unsigned int SwathWidthSingleDPPY, double BytePerPixelDETY, double BytePerPixelDETC, unsigned int SwathHeightY, unsigned int SwathHeightC, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, double *DSTXAfterScaler, double *DSTYAfterScaler ) argument
872 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
[all...]
H A Ddisplay_mode_vba_20.c126 bool Interlace,
816 bool Interlace,
828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1897 mode_lib->vba.Interlace[k],
1939 mode_lib->vba.Interlace[k],
2143 mode_lib->vba.Interlace[k],
4175 && mode_lib->vba.Interlace[k] == true
4530 mode_lib->vba.Interlace[k],
4569 mode_lib->vba.Interlace[k],
4760 mode_lib->vba.Interlace[
812 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_utils.c45 dml_timing_array->Interlace[dst_index] = dml_timing_array->Interlace[src_index];
H A Ddisplay_mode_core_structs.h555 dml_bool_t Interlace[__DML_NUM_PLANES__]; member in struct:dml_timing_cfg_st
1241 dml_bool_t *Interlace; member in struct:UseMinimumDCFCLK_params_st
1484 dml_bool_t *Interlace; member in struct:CalculateStutterEfficiency_params_st
H A Ddisplay_mode_util.c538 dml_print("DML: timing_cfg: plane=%d, Interlace = %d\n", i, timing->Interlace[i]);
H A Ddml_display_rq_dlg_calc.c215 dml_bool_t interlaced = timing->Interlace[plane_idx];
H A Ddisplay_mode_core.c215 dml_bool_t Interlace,
2373 dml_bool_t Interlace,
2404 *VInitPreFill = (dml_uint_t)(dml_floor((VRatio + (dml_float_t) VTaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1));
2692 //Progressive To Interlace Unit Effect
2695 if (display_cfg->timing.Interlace[k] == 1 && ptoi_supported == true) {
3921 dml_bool_t isInterlaceTiming = p->Interlace[k] && !p->ProgressiveToInterlaceUnitInOPP;
4667 p->Interlace[k],
6197 if (timing->Interlace[plane_idx] && !ptoi_supported)
6371 myPipe->InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k];
7310 if (mode_lib->ms.cache_display_cfg.output.OutputFormat[k] == dml_420 && mode_lib->ms.cache_display_cfg.timing.Interlace[
2370 CalculatePrefetchSourceLines( dml_float_t VRatio, dml_uint_t VTaps, dml_bool_t Interlace, dml_bool_t ProgressiveToInterlaceUnitInOPP, dml_uint_t SwathHeight, enum dml_rotation_angle SourceScan, dml_bool_t ViewportStationary, dml_uint_t SwathWidth, dml_uint_t ViewportHeight, dml_uint_t ViewportXStart, dml_uint_t ViewportYStart, dml_uint_t *VInitPreFill, dml_uint_t *MaxNumSwath) argument
[all...]
H A Ddml2_translation_helper.c600 out->Interlace[location] = in->timing.flags.INTERLACE;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c192 bool Interlace,
493 bool Interlace[],
1739 bool Interlace,
1752 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2366 v->Interlace[k],
2423 v->Interlace[k],
2553 (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP) ?
2619 myPipe.InterlaceEnable = v->Interlace[k];
3161 isInterlaceTiming = (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP);
3236 v->Interlace,
1735 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
6306 CalculateStutterEfficiency( struct display_mode_lib *mode_lib, int CompressedBufferSizeInkByte, bool UnboundedRequestEnabled, int ConfigReturnBufferSizeInKByte, int MetaFIFOSizeInKEntries, int ZeroSizeBufferEntries, int NumberOfActivePlanes, int ROBBufferSizeInKByte, double TotalDataReadBandwidth, double DCFCLK, double ReturnBW, double COMPBUF_RESERVED_SPACE_64B, double COMPBUF_RESERVED_SPACE_ZS, double SRExitTime, double SRExitZ8Time, bool SynchronizedVBlank, double Z8StutterEnterPlusExitWatermark, double StutterEnterPlusExitWatermark, bool ProgressiveToInterlaceUnitInOPP, bool Interlace[], double MinTTUVBlank[], int DPPPerPlane[], unsigned int DETBufferSizeY[], int BytePerPixelY[], double BytePerPixelDETY[], double SwathWidthY[], int SwathHeightY[], int SwathHeightC[], double NetDCCRateLuma[], double NetDCCRateChroma[], double DCCFractionOfZeroSizeRequestsLuma[], double DCCFractionOfZeroSizeRequestsChroma[], int HTotal[], int VTotal[], double PixelClock[], double VRatio[], enum scan_direction_class SourceScan[], int BlockHeight256BytesY[], int BlockWidth256BytesY[], int BlockHeight256BytesC[], int BlockWidth256BytesC[], int DCCYMaxUncompressedBlock[], int DCCCMaxUncompressedBlock[], int VActive[], bool DCCEnable[], bool WritebackEnable[], double ReadBandwidthPlaneLuma[], double ReadBandwidthPlaneChroma[], double meta_row_bw[], double dpte_row_bw[], double *StutterEfficiencyNotIncludingVBlank, double *StutterEfficiency, int *NumberOfStutterBurstsPerFrame, double *Z8StutterEfficiencyNotIncludingVBlank, double *Z8StutterEfficiency, int *Z8NumberOfStutterBurstsPerFrame, double *StutterPeriod) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c164 bool Interlace,
1215 bool Interlace,
1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1868 mode_lib->vba.Interlace[k],
1924 mode_lib->vba.Interlace[k],
2151 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k];
3445 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k];
4390 && mode_lib->vba.Interlace[k] == true
4640 mode_lib->vba.Interlace[k],
4696 mode_lib->vba.Interlace[
1211 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c175 bool Interlace,
1614 bool Interlace,
1626 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2235 v->Interlace[k],
2292 v->Interlace[k],
2442 myPipe.InterlaceEnable = v->Interlace[k];
4187 || (v->OutputFormat[k] == dm_420 && v->Interlace[k] == true && v->ProgressiveToInterlaceUnitInOPP == true))) {
4414 v->Interlace[k],
4469 v->Interlace[k],
4776 myPipe.InterlaceEnable = v->Interlace[
1610 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h498 bool Interlace[DC__NUM_DPP__MAX]; member in struct:vba_vars_st
H A Ddisplay_mode_vba.c594 mode_lib->vba.Interlace[mode_lib->vba.NumberOfActivePlanes] = dst->interlaced;
1052 //Progressive To Interlace Unit Effect
1055 if (mode_lib->vba.Interlace[k] == 1
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser.c1288 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace;
1406 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace;
/linux-master/drivers/gpu/drm/radeon/
H A Datombios.h3246 USHORT Interlace:1; member in struct:_ATOM_MODE_MISC_INFO
3262 USHORT Interlace:1;
/linux-master/drivers/gpu/drm/amd/include/
H A Datombios.h3723 USHORT Interlace:1; member in struct:_ATOM_MODE_MISC_INFO
3739 USHORT Interlace:1;

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