/linux-master/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77470.c | 761 PINMUX_IPSR_GPSR(IP6_31_28, DU0_DB6), 762 PINMUX_IPSR_GPSR(IP6_31_28, A22), 2833 /* IP6_31_28 [4] */
|
H A D | pfc-r8a77951.c | 84 #define GPSR0_12 F_(D12, IP6_31_28) 311 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 461 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 998 PINMUX_IPSR_GPSR(IP6_31_28, D12), 999 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4), 1000 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3), 1001 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2), 1002 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0), 1003 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR [all...] |
H A D | pfc-r8a7796.c | 89 #define GPSR0_12 F_(D12, IP6_31_28) 316 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 466 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 1002 PINMUX_IPSR_GPSR(IP6_31_28, D12), 1003 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4), 1004 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3), 1005 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2), 1006 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0), 1007 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR [all...] |
H A D | pfc-r8a77965.c | 89 #define GPSR0_12 F_(D12, IP6_31_28) 316 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 466 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 1004 PINMUX_IPSR_GPSR(IP6_31_28, D12), 1005 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4), 1006 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3), 1007 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2), 1008 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0), 1009 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR [all...] |
H A D | pfc-r8a77970.c | 120 #define GPSR3_15 F_(VI1_DATA11, IP6_31_28) 219 #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 285 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 639 PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11), 640 PINMUX_IPSR_GPSR(IP6_31_28, SCL4), 641 PINMUX_IPSR_GPSR(IP6_31_28, IRQ4), 642 PINMUX_IPSR_GPSR(IP6_31_28, D14), 2293 IP6_31_28
|
H A D | pfc-r8a77980.c | 135 #define GPSR3_15 F_(VI1_DATA11, IP6_31_28) 253 #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) F_(0, 0) FM(D14) FM(MMC_D6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 335 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 712 PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11), 713 PINMUX_IPSR_GPSR(IP6_31_28, SCL4), 714 PINMUX_IPSR_GPSR(IP6_31_28, D14), 715 PINMUX_IPSR_GPSR(IP6_31_28, MMC_D6), 2747 IP6_31_28
|
H A D | pfc-r8a77990.c | 75 #define GPSR0_10 F_(D10, IP6_31_28) 271 #define IP6_31_28 FM(D10) FM(MSIOF2_RXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA13_A) FM(DU_DG1) FM(RIF3_D0_B) FM(HTX3_E) FM(LCDOUT9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 402 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 910 PINMUX_IPSR_GPSR(IP6_31_28, D10), 911 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_RXD_A, SEL_MSIOF2_0), 912 PINMUX_IPSR_MSEL(IP6_31_28, VI5_DATA13_A, SEL_VIN5_0), 913 PINMUX_IPSR_GPSR(IP6_31_28, DU_DG1), 914 PINMUX_IPSR_MSEL(IP6_31_28, RIF3_D0_B, SEL_DRIF3_1), 915 PINMUX_IPSR_GPSR(IP6_31_28, HTX3_ [all...] |
H A D | pfc-r8a77995.c | 104 #define GPSR2_18 F_(VI4_DATA17, IP6_31_28) 267 #define IP6_31_28 FM(VI4_DATA17) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 376 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 741 PINMUX_IPSR_GPSR(IP6_31_28, VI4_DATA17), 742 PINMUX_IPSR_MSEL(IP6_31_28, HTX3_A, SEL_HSCIF3_0), 2734 IP6_31_28
|